SmartDV to Exhibit at OpenPower Summit August 19-20


 nPower Products 
 On Sale !

 Best Prices
 Fastest Delivery 
 Direct From


 www.CADalog.com 

SAN JOSE, Calif., Aug. 13, 2019 (GLOBE NEWSWIRE) --

WHO: SmartDV™ Technologies, the Proven and Trusted choice for Verification Intellectual Property (VIP) supporting simulation emulation, field programmable gate array (FPGA), formal models and post-silicon validation platforms, Design IP and rapid customized VIP and Design IP development 

WHAT: Will feature the first commercially available OpenCAPI Verification IP compatible with the OpenCAPI 3.0 and 3.1 standard at the OpenPower Summit.

WHEN:
Monday and Tuesday, August 19 and 20. Attendees can schedule demonstrations through: demo@smart-dv.com

WHERE:
Manchester Grand Hyatt, San Diego, Calif.
SmartDV’s OpenCAPI Verification IP verifies OpenCAPI interfaces and includes an extensive test suite that performs random or directed protocol tests to create a range of scenarios to effectively verify the design under test. It supports all major verification languages and methodologies, including open verification methodology (OVM), universal verification methodology (UVM) and SystemC.

About SmartDV

SmartDV™ Technologies is the Proven and Trusted choice for Verification and Design IP with the best customer service from more than 250 experienced ASIC and SoC design and verification engineers. Its high-quality standard or custom protocol Verification and Design IP are compatible with all verification languages, platforms and methodologies supporting all simulation, emulation and formal verification tools used in a coverage-driven chip design verification flow. The result is Proven and Trusted Verification and Design IP used in hundreds of networking, storage, automotive, bus, MIPI and display chip projects throughout the global electronics industry. SmartDV is headquartered in Bangalore, India, with U.S. headquarters in San Jose, Calif. Visit SmartDV to learn more.

Connect with SmartDV at:
Linkedin: https://www.linkedin.com/company/smartdv-technologies/about/
Twitter: @SmartDV 

For more information, contact:
Nanette Collins                                     
Public Relations for SmartDV
(617) 437-1822                                                  
nanette@nvc.com           

 

Primary Logo




Review Article Be the first to review this article
Aldec

 Advanced Asembly

Featured Video
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
You’re Invited! CEO Outlook May 18
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Automating the UVM Register Abstraction Layer (RAL)
Jobs
Pre-silicon Design Verification Engineer for Intel at Santa Clara, California
Electronics Engineer for Lockheed Martin at Sunnyvale, California
Technical Product Manager- SISW-EDA 238452 for Siemens AG at Fremont, California
SerDes Applications Design Engineer for Xilinx at San Jose, California
Staff SerDes Applications Design Engineer for Xilinx at San Jose, California
Sr Engineer - RF/mmWave IC Design for Global Foundaries at Santa Clara, California
Upcoming Events
DVCon China 2021 at Shanghai China - May 26, 2021
CadenceLIVE Americas 2021 at United States - Jun 8 - 9, 2021
DesignCon 2021 at San Jose McEnery Convention Center San Jose, CA San Jose CA - Aug 16 - 18, 2021
SEMICON Southeast Asia 2021 Hybrid Event at Setia SPICE Convention Centre Penang Malaysia - Aug 23 - 27, 2021
Verific: SystemVerilog & VHDL Parsers



© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise