SmartDV to Demonstrate TileLink Verification IP for RISC-V Based Systems, Smart ViPDebug Protocol Debugger at DVCon India

SAN JOSE, Calif., Sept. 10, 2019 (GLOBE NEWSWIRE) --

WHO: SmartDV™ Technologies, the Proven and Trusted choice for Verification Intellectual Property (VIP) supporting simulation, emulation, field programmable gate array (FPGA) prototyping, formal models and post-silicon validation platforms, Design IP and rapid customized VIP and Design IP development.

WHAT: Will demonstrate TileLink VIP used to verify the TileLink chip-scale interconnect standard, an open-source, high-performance and scalable cache-coherent fabric for RISC-V based system on chip (SoC) designs at DVCon India. Another demonstration will showcase Smart ViPDebug™, a protocol debugger that reduces debug time by rapidly identifying violations and reducing the time needed to find the cause of violations through its linked waveform and transaction database views.

WHEN: Wednesday and Thursday, September 25 and 26. Attendees can schedule demonstrations through: demo@smart-dv.com

WHERE: Radisson Blu Bengaluru in Bangalore, India.

About SmartDV
SmartDV™ Technologies is the Proven and Trusted choice for Verification and Design IP with the best customer service from more than 250 experienced ASIC and SoC design and verification engineers. Its high-quality standard or custom protocol Verification and Design IP are compatible with all verification languages, platforms and methodologies supporting all simulation, emulation, FPGA prototyping and formal verification tools used in a coverage-driven chip design verification flow. The result is Proven and Trusted Verification and Design IP used in hundreds of networking, storage, automotive, bus, MIPI and display chip projects throughout the global electronics industry. SmartDV is headquartered in Bangalore, India, with U.S. headquarters in San Jose, Calif. Visit SmartDV to learn more.

Connect with SmartDV at:
Linkedin: https://www.linkedin.com/company/smartdv-technologies/about/
Twitter: @SmartDV

For more information, contact:
Nanette Collins
Public Relations for SmartDV
(617) 437-1822                                                  
nanette@nvc.com

 

Primary Logo




Review Article Be the first to review this article
Aldec

Featured Video
Latest Blog Posts
Colin WallsEmbedded Software
by Colin Walls
Selecting a CPU
Graham BellSilvaco Nanometer Newsbyte
by Graham Bell
Everything You Want to Know about Silvaco Foundation IP
Jobs
Product Applications Engineer for DiCon Fiberoptics, Inc. at Richmond, California
Nano-Optics Process Engineer for DiCon Fiberoptics, Inc. at Richmond, California
Team-Lead - Image Production (m/f/d) for Vexcel-Imaging GmbH at Graz, Austria
Upcoming Events
SEMICON Taiwan 2019 at TaiNEX Taipei Taiwan - Sep 18 - 20, 2019
MEMS & Imaging Sensors Summit at World Trade Center Grenoble France - Sep 25 - 27, 2019
2019 Electronic Design Process Symposium at Milpitas CA - Oct 3 - 4, 2019
Embedded Systems Week (ESWEEK) at New York City NY - Oct 13 - 18, 2019
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: UltraPLL



Internet Business Systems © 2019 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise