Philipp A. Hartmann to Receive Accellera Systems Initiative Technical Excellence Award

ELK GROVE, Calif., Feb. 25, 2020 (GLOBE NEWSWIRE) -- Accellera Systems Initiative (Accellera) announced today that Philipp A. Hartmann, most recently Chair of the SystemC Language Working Group (LWG), is the recipient of the 2020 Accellera Technical Excellence Award. The award was established to recognize the outstanding achievements of an individual among Accellera’s working group members and their significant contributions to the development of its standards.

Hartmann, a key contributor to the advancement of the SystemC language standard, will be presented with the award at DVCon U.S. on Monday, March 2 during the Accellera Day luncheon from 12:00-1:30pm at the DoubleTree Hotel in San Jose, California.

“Philipp has been an invaluable, active member of Accellera for many years, driving the evolution of the SystemC standard as well as being one of the most crucial contributors to the code development of the SystemC reference implementation,” stated Martin Barnasconi, Accellera Technical Committee Chair. “The unique combination of his leadership skills, as well as his profound knowledge of the C++ and SystemC language, has made him one of the most prolific and noteworthy developers over the last decade to the SystemC standardization efforts in Accellera. With Philipp’s dedication, the SystemC community has been rewarded with a feature-rich and robust standard. It is my privilege to honor Philipp with this well-deserved award.”

“I am honored to receive this award from Accellera,” said Hartmann. “I have enjoyed working with many of the SystemC contributors and users to help improve the use, quality and efficiency of the SystemC language standard and reference implementation. It has been very rewarding to be a member of the SystemC community and contributor to the advancements of the SystemC ecosystem. As a team, we’ve established the annual SystemC Evolution Day, and I am thankful for the opportunity to help build it and see its successful integration into the SystemC standardization cycle.”

As a SystemC user for almost two decades, Hartmann joined the SystemC standardization effort in 2009 with several contributions to the IEEE Std. 1666-2011. He served as the SystemC Language WG Chair from 2013-2019 and contributed as member to the Transaction-Level Modeling (TLM), SystemC Control, Configuration and Introspection (CCI), SystemC Analog/Mixed-Signal (AMS), and SystemC Verification working groups. In addition, he led to the installation of the public SystemC GitHub repository for community use. Hartmann is also one of the initial organizers of SystemC Evolution Day, a user-driven workshop sponsored by Accellera where the SystemC community meets annually to discuss and advance SystemC standards.

Hartmann started his career in academia as a researcher at the OFFIS Institute for Information Technology, where he co-authored more than 25 peer-reviewed publications in the field of EDA system-level design methodologies. Later he continued his work on system-level tools, flows and methods for mobile SoCs as a Senior Member of Technical Staff at Intel. He holds a degree in computer science from the University of Bonn, Germany.

About the Accellera Technical Committee
Accellera's Technical Committee oversees 13 active working groups that produce effective and efficient Electronic Design Automation (EDA) and Intellectual Property (IP) standards for today’s advanced electronic integrated circuits and embedded systems. Working group participants contribute to the development of standards for the electronics and semiconductor industry. Technical contributors typically have many years of practical experience in standardization of methodologies and languages for system-level design, integration, verification or automation. For a list of Accellera working groups, please click here.

About Accellera Systems Initiative
Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit Find out more about membership. Follow @accellera on Twitter or to comment, please use #accellera. Accellera Global Sponsors are: Cadence; Mentor, A Siemens Business; and Synopsys.

About DVCon U.S.
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. In response to global interest, in addition to DVCon U.S., Accellera also sponsors events in China, Europe and India. For more information about DVCon U.S., please visit Follow DVCon on Facebook or @dvcon_us on Twitter or to comment, please use #dvcon_us.

Accellera, Accellera Systems Initiative, and DVCon and are trademarks of Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners.

For more information, contact:
Barbara Benjamin
Public Relations for Accellera Systems Initiative
Phone: +1 503 209 2323

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