Agnisys Speeds up SoC Verification with Launch of IDesignSpec NG at DVCON USA

IDesignSpec NG automatically generates code for hardware-software interface for all platforms – software, hardware, FPGA and silicon

Milpitas, Calif., March 2, 2020 – Agnisys, Inc., today announced the launch of their new product  -IDesignSpec NG  - for specifying a golden hardware-software interface (HSI) specification and automatically generating a number of outputs such as UVM test bench, RTL (Verilog, VHDL, System Verilog), System C, C headers, HTML, PDF, MS Word for the different SoC development teams.  Powered by a 30-40 percent improvement in performance when compared with other solutions, IDesignSpec NG works across all operating systems – Windows and Linux – to provide designers with an easy-to-use interface for specifying the register specification along with the creating the custom test sequences needed to verify it.

“As we continue to develop cutting edge products for power and sensing technologies, it's important for us to ensure the reliability of the complex hardware-software interface defined in our SoCs” said Khalid Chishti, ASIC development manager, Allegro MicroSystems.. “The Next Gen IDesignSpec (IDS-NG) product from Agnisys has helped us create correct-by-construction devices while reducing our time to market and ensuring highest quality. IDS-NG also allows for us to reduce time spent on hand-writing production HDL and UVM test benches - leaving more time for us to focus on application for breakthrough innovations. Agnisys support has been quite responsive and is always in lock step with our development team.”

With new features such as ability to define custom sequences using machine language, diff and merge capability, interface to versioning platforms such as GIT along with the ability to see multiple views, IDesignSpec NG enables designers to seamlessly specify and verify the register interface.  “IDesignSpec NG was developed with the intent of providing a single user interface to specify and verify the register interface across all operating platforms” said Anupam Bakshi, Founder and CEO, Agnisys Inc.. “Using IDesignSpec NG, users can define the HSI using the format they are comfortable with, including SystemRDL and Python and view the specification in different formats such as the register view, param view, spreadsheet view or the sequence view. “

Agnisys also announced the ARV product now has the capability to automatically generate C tests to verify the HSI. The sequences used by the verification team, when generated as C tests along with the header files can now be used to verify the HSI in a bare metal simulation environment and by the validation teams to verify the HSI post silicon.

At DVCON  USA, (March 2 - 5, 2020) Agnisys will present its customer proven SoC design and intellectual property (IP) solutions including IDesignSpec NG along with a workshop - SystemRDL to PSS - Basic to Pro and poster session - Key gotchas in implementing CDC for various bus protocols. The company will focus on showcasing how IDesignSpec NG along with ARV and ISequenceSpec to enable software, hardware, verification and validation engineers to accelerate their IP/SoC development and verification cycle while mitigating the risk for first pass silicon.  To enable design teams to accelerate their development cycle, Agnisys will also showcase how they can assemble their modules with the SoC Enterprise to create the top level and then finally creating the test sequences using Specta-AV to generate a UVM test bench along with test vectors.

About Allegro MicroSystems

Allegro MicroSystems is redefining the future of power and sensing technologies. From green energy to advanced mobility and motion control systems, our team is passionate about developing intelligent solutions that move the world forward and give our customers a competitive edge. With global engineering, manufacturing and support, Allegro is a trusted partner to both large enterprises and regional market leaders worldwide.

Visit for more information.

About Agnisys

Agnisys Inc. is a leading supplier of Electronic Design Automation (EDA) software for solving complex design and verification problems for system development. Its products enable hardware, software and verification teams to describe the hardware-software specifications (HSI) for system-on-chip (SoC) and intellectual property (IP) designs, generate the desired outputs for all teams and verify the HSI across all platforms - hardware, software, FPGA and silicon. Based on patented technology, its products enable design teams to collaborate efficiently while eliminating system design and verification errors thereby significantly reducing the development cycles.

Founded in 2007, Agnisys is based in Boston, Massachusetts, with R&D centers in the United States and India.  Visit for more information.

Media contact for Agnisys:

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