Aldec Quarterly Newsletter Q1 2020

See what's going on at Aldec. Get updates on Press Releases, Webinars, Blogs, Articles, White Papers, App Notes and Tutorial Videos.

 

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Solutions Products Events News Blog
2020  Q1
                                                                                                                    Newsletter
                                                                                                                    Aldec
 

Read our recent press releases:

InterMotion Technology boosts IP verification productivity for Lattice Semiconductor’s CrossLink FPGA family using Aldec’s Active-HDL

Aldec and Codasip at Embedded World: Showcasing an Integrated UVM Simulation Environment for Verifying Custom Instructions with RISC-V Cores

Cobham Gaisler successfully verifies its first RISC-V processor, NOEL-V, using Aldec’s Riviera-PRO for HDL Simulation


 

4K

How to Develop a 4K Ultra High Definition Image/Video Processing...

Achieving higher resolution is a never-ending race for camera, TV and display manufacturers...

Read More
pulling

Is you Verification plan pulling you in multiple directions?...

The verification process is long and time consuming, especially when...

Read More
ARM  chip

ARM-based SoC Co-Emulation using Zynq Boards

Have you ever worked on a group project where you had to combine your work with...

Read More

COVID-19, We're Here to Help

All active Aldec customers and partners with valid maintenance are eligible to receive a 30-day temporary license.

If you need temporary licenses so that you or your team members can work remotely from home, simply click below and we will process the license immediately.

 

Get a License
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Recent Webinars:


Six Automated Steps to Design Partitioning for Multi-FPGA Prototyping Boards

Hierarchical CDC verification with ALINT-PRO

Shortening verification time of safety critical projects

Creating an AXI4 Lite, Transaction Based VHDL Testbench with OSVVM

UVVM steps up a gear: A review of some of the new features in this standardized VHDL verification methodology

Upcoming Webinars:

Satisfy FPGA traceability requirements for DO-254 with Spec-TRACER™ and IBM® Requirements Engineering DOORS® Next (US)

Satisfy FPGA traceability requirements for DO-254 with Spec-TRACER™ and IBM® Requirements Engineering DOORS® Next (EU)

 

How to develop a real time human detection application on an FPGA edge device using deep learning (US)

How to develop a real time human detection application on an FPGA edge device using deep learning (EU)

 

Designing Finite State Machines for Safety Critical Systems (US)

Designing Finite State Machines for Safety Critical Systems (EU)

Aldec is a global industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, Embedded, SoC and ASIC Prototyping, Design Rule Checking, CDC Verification, IP Cores, DO-254 Functional Verification and Military/Aerospace solutions.

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For more product information, please contact  sales@aldec.com  or your  local distributor .

Aldec, Inc.
2260 Corporate Circle, Henderson, NV 89074, USA
+702.990.4400 | www.aldec.com




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