Lattice Collaborating with Open Compute Project Members to Accelerate Development of Secure System Control Applications

Visit Lattice’s Virtual Booth at 2020 OCP Global Summit to Learn More

HILLSBORO, Ore. — (BUSINESS WIRE) — May 7, 2020Lattice Semiconductor (NASDAQ: LSCC), the low power programmable leader, will highlight the company’s flexible, scalable, and customizable Platform Firmware Resiliency (PFR) solution based on its MachXO3D™ FPGA in a virtual exhibit at the 2020 Open Compute Project (OCP) Virtual Summit. Additionally, Lattice will share updates on its ongoing initiatives with the Open Domain-Specific Architecture (ODSA) Proof-of-Concept (PoC) Workgroup, including a new PoC FPGA development board for secure control and management based on the Lattice Nexus™ FPGA platform. Founded by Facebook, the OCP is a rapidly growing, global Community focused on redesigning hardware technology to address growing demands on datacenter compute infrastructure.

Who:

Lattice Semiconductor

What:

2020 OCP Virtual Summit

When:

May 12 - 15, 2020

 

9:00 a.m. – 4:00 p.m.

Where:

https://www.opencompute.org/summit/global-summit (free registration required)

Bapi Vinnakota, ODSA Sub-Project Lead with the Open Compute Project Foundation said, “Since its charter in March 2019 within the OCP, the ODSA Sub-Project has made critical steps in defining and developing a chiplet-based architecture with the introduction of a new, open die-to-die interface and an early proof-of-concept system. Lattice’s contribution of a board for secure control and management to the OCP and ODSA has been invaluable.”

The ODSA workgroup designed a PoC base board that connects multiple small interoperable, interchangeable boards that model the performance of a single-chip solution based on chiplets. As part of this ecosystem, Lattice developed a PoC board for secure control and management that plugs into the PoC base board to enable the prototyping of a secure SiP solution.

“We look forward to seeing our security expertise and low power Lattice Nexus FPGA platform help developers implement robust hardware security in their datacenter designs,” said Shyam Chandra, Business Development Manager, Lattice Semiconductor. “We’re excited to collaborate with the OCP and ODSA as we work together to bring the ODSA’s PoC vision from concept to reality.”

Attacks in the supply chain can expose system firmware to threats like malware injection, denial-of-service (DoS) attacks, or the installation of a backdoor to weaken the system against future attacks. MachXO3D FPGAs are the industry’s first control-oriented FPGAs compliant with the NIST PFR specification and provide a quick and easy way for developers to design PFR-protected servers. Acting as a hardware Root of Trust (RoT), the MachXO3D can block attacks against firmware storage during system operation and ensures all processors in the system only execute trusted firmware. In addition to the MachXO3D FPGA, the Lattice PFR solution includes software tools and IP that enable OEMs to easily adopt and customize PFR functionality for their servers.

For more information about the ODSA PoC Workgroup, please visit https://www.opencompute.org/wiki/Server/ODSA.

For more information about the Lattice PFR solution, please visit http://www.latticesemi.com/PFR.

For more information about the MachXO3D family of secure control FPGAs, please visit http://www.latticesmi.com/MachXO3D.

About Lattice Semiconductor

Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. We solve customer problems across the network, from the Edge to the Cloud, in the growing communications, computing, industrial, automotive, and consumer markets. Our technology, long-standing relationships, and commitment to world-class support lets our customers quickly and easily unleash their innovation to create a smart, secure and connected world.

For more information about Lattice, please visit www.latticesemi.com. You can also follow us via LinkedIn, Twitter, Facebook, YouTube, WeChat, Weibo or Youku.

Lattice Semiconductor Corporation, Lattice Semiconductor (& design) and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. The use of the word “partner” does not imply a legal partnership between Lattice and any other entity.

GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.



Contact:

MEDIA CONTACTS:
Bob Nelson
Lattice Semiconductor
408-826-6339
Bob.Nelson@latticesemi.com

INVESTOR CONTACT:
Rick Muscha
Lattice Semiconductor
408-826-6000
Rick.Muscha@latticesemi.com




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