Aldec Webinar: RISC-V Design & Verification with FPGA Hardware In The Loop

Aldec
                                                          Logo

Presenter: Krzysztof Szczur, Verification Products Manager

Thursday, September 24, 2020

Abstract:

The RISC-V ISA has opened tremendous opportunities creating a breeze of fresh air in the ARM dominated design houses of embedded SoC projects. We didn’t have to wait long until the first RTL implementations of the RISC-V processor were started (both open source and commercial). Currently there are several open source projects of RISC-V CPU cores. There is however a verification gap between the open source fabless design and the ones that are intended to be taped out. The HDL/RTL simulation that works well for research and open source projects is not sufficient in case of huge investments in chip fabrication where designs must be verified exhaustively. 

In this webinar we will present how FPGA hardware-assisted verification such as simulation acceleration, emulation and prototyping can be used at different verification stages to bridge the verification gap, increase functional test coverage and enable true hardware-software co-verification of RISC-V cores and SoCs.

Agenda: 

  • RISC-V System-on-Chip Verification Challenges
  • Verification With Hardware In The Loop - Stages & Methods
  • Introduction to Aldec HES-DVM Hardware Assisted Verification
  • RISC-Verification Cases:
    • Simulation Acceleration
    • Hybrid Co-Emulation
    • Physical Prototyping

Event Info

EU Session
3:00 PM – 4:00 PM CEST
Thursday, September 24, 2020
Register for EU Session
US Session
 11:00 AM – 12:00 PM PT
 Thursday, September 24, 2020
Register for US Session
Presenter  
Chris
                                                          Szczur

Bio:

Chris Krzysztof Szczur is a Hardware Verification Products Manager at Aldec.

Chris joined Aldec in 2001 and was a key member of the team that developed HES-DVM™, Aldec's FPGA-based emulation and prototyping technology. In his engineering career he has also worked in the fields of HDL design verification, testbench automation and DO-254 compliance. Krzysztof has practical experience and a deep understanding of hardware assisted verification methodologies. Krzysztof graduated as M.Eng. in Electronic Engineering (EE) at the AGH University of Science and Technology in Krakow, Poland.

 

View On Demand Webinar View Upcoming Webinars



Review Article Be the first to review this article
Editorial
Roberto FrazzoliEDACafe Editorial
by Roberto Frazzoli
Discovering Cadence Integrity 3D-IC platform
More Editorial  
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Breker’s Maheen Hamid Appointed to SEMI ESD Alliance Governing Council
Vincent ThibautArteris IP Blog
by Vincent Thibaut
Why Automate Traceability?
Jobs
Business Operations Planner for Global Foundaries at Santa Clara, California
Applications Engineer EDA functional verification for Siemens EDA at Fremont, California
Staff SerDes Applications Design Engineer for Xilinx at San Jose, California
CSM Design Verification Lead for Apple Inc at Cupertino, California
Pre-silicon Design Verification Engineer for Intel at Santa Clara, California
NAND Hardware Engineer for Apple Inc at Cupertino, California
Upcoming Events
DVCon Europe 2021 at Germany - Oct 26 - 27, 2021
SemIsrael Expo 2021 - November 9, 2021 at Avenue Convention Center, Israel Haifa Israel - Nov 9, 2021
Semicon West Hybrid 2021 at Moscone North and South San Francisco, CA - Dec 7 - 9, 2021
67th Annual IEEE International Electron Devices Meeting at Hilton San Francisco Union Square hotel San Francisco - Dec 11 - 15, 2021



© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise