RISC-V International Announces Agenda for the Third Annual RISC-V Summit

The leading RISC-V conference will be held virtually this year, featuring keynotes, tutorials, exhibitions, networking opportunities and more

WHAT: The RISC-V International Association has announced the online program for the RISC-V Summit 2020.

WHEN: Tuesday, Dec. 8, 2020 to Thursday, Dec. 10, 2020.

WHERE: Register online  here.

DETAILS: RISC-V International will hold its third annual RISC-V Summit online from Dec. 8-10, 2020. The RISC-V Summit brings together innovators, academics and business leaders to discuss the latest developments in the RISC-V ecosystem and dive deeper into collaboration and commercialization opportunities. The virtual event will allow the global RISC-V community to come together, while delivering the same high-quality content as previous in-person events. Leading technology companies and research institutions will share notable product updates, projects and implementations, and discuss how the RISC-V ISA is driving the next generation of hardware, software and IP. The event will also feature an online exhibition hall and networking opportunities. Speakers for the RISC-V Summit include executives from Andes Technology, Alibaba, the CHIPS Alliance, Google, IBM, NXP Semiconductors, OneSpin Solutions, RedHat, Seagate, SiFive, Western Digital and more.

The Members Only Day, which is being held a day prior to the conference on Monday, Dec. 7, will give RISC-V International members the opportunity to connect, share updates around working group activities, network and more.

RISC-V Summit activities are as follows:

  • Monday, Dec. 7, 2020 – RISC-V International member companies will gather for a day of sessions focused on the future direction of the organization.
  • Tuesday and Wednesday, Dec. 8-9, 2020 – The main conference will take place on these two days, with keynotes in the morning followed by breakout sessions, tutorials and more.
  • Thursday, Dec. 10, 2020 – The last day of the RISC-V Summit will include technical tutorials highlighting RISC-V implementations across a variety of industries.

The three-day conference will feature keynote presentations with industry pioneers highlighting the continued rapid expansion of the RISC-V ecosystem, showcasing how RISC-V is disrupting the semiconductor industry. Please note keynotes presentations will be announced in the coming weeks. For the latest agenda updates and schedule, please visit: https://tmt.knect365.com/risc-v-summit/agenda/1/.

Premier, Strategic and Community level members of RISC-V International qualify for discount codes. To learn more about these packages and limited-time promotions, please visit: https://tmt.knect365.com/risc-v-summit/purchase/select-package.

Ruby, Diamond, Gold and Silver sponsorship packages are also available, see details here: https://tmt.knect365.com/risc-v-summit/sponsor-or-book/.

For press and analysts interested in attending, please email Racepoint Global at Email Contact to receive your complimentary pass.

Supporting Resources

About RISC-V International

RISC-V (pronounced “risk-five”) is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015, the RISC-V International comprises more than 600 [MS8] members building the first open, collaborative community of software and hardware innovators powering a new era of processor innovation. RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.

RISC-V International, a non-profit organization controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of the RISC-V International have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem.

Media Contact:

Mark Sinclair

Racepoint Global for RISC-V International

Phone: +1 (415) 694-6700

Email Contact 




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