Synopsys and Samsung Foundry Collaboration Delivers Optimized Reference Methodology for High-Performance Compute Designs

Synopsys Fusion Design Platform Enables Full-Flow Quality-of-Results and Fastest Design Convergence on Samsung Advanced Process Technology

MOUNTAIN VIEW, Calif., Oct. 28, 2020 — (PRNewswire) —

Highlights:

  • Synopsys and Samsung have collaborated on the enablement of Fusion Design Platform to unleash the benefits of Samsung's most advanced process nodes
  • Certified flow provides designers a complete suite of industry-leading digital implementation and signoff solutions for timing and extraction
  • Synopsys Fusion Design Platform accelerates the delivery of high-performance compute designs with the industry's best quality of results and turnaround time

Synopsys, Inc. (Nasdaq: SNPS) today announced its collaboration with Samsung Foundry to deliver a new certified digital implementation, timing and physical signoff reference flow accelerating high-performance compute (HPC) designs using the Synopsys Fusion Design Platform. With the certified reference flow, designers can achieve accelerated productivity through automated features and integrations in the platform, providing a clear path to meet their design objectives on Samsung's advanced process nodes.

As part of the platform, Design Compiler® NXT, IC CompilerII and Fusion Compilersolutions have been enhanced with new innovative features allowing mutual customers to leverage Samsung advance process technologies and achieve the best power, performance and area (PPA) metrics while delivering a faster turnaround time on their designs. By leveraging the fusion of StarRC signoff extraction and PrimeTime® signoff delay calculation engine in the platform, the HPC reference flow delivers predictable and convergent design closure with a zero-margin flow and maximizes PPA gains available through Samsung's advanced process technology.

"There is an increasing demand from our mutual customers for a certified reference flow for HPC designs on our advance processes," said Sangyun Kim, vice president of Foundry Design Technology Team at Samsung Electronics. "Our extensive collaboration with Synopsys has enabled the digital implementation and signoff reference flow for HPCs utilizing the latest technologies from the Fusion Design Platform to deliver predictable and quality flows for our advanced process nodes."

Next-generation HPC designs have aggressive clock target frequencies, stringent power requirements, high utilization goals and require support for the most advanced process geometries. Synopsys' Fusion Design Platform offers innovative features to address these challenges such as concurrent clock and data optimization, signoff and exhaustive path-based timing analysis, multi-source clock tree synthesis, hash via support, freeform macro placement, and Machine Learning technologies for the next wave of HPC designs. The HPC reference flow provides a comprehensive methodology and includes a full set of documented flows and design examples validated by Samsung Foundry and Synopsys.

"Our early collaboration with Samsung Foundry has enabled our mutual customers to leverage our advanced technologies and solutions' on Samsung's most advanced process technologies," said Charles Matar, senior vice president of System Solutions and Ecosystem Enablement, Design Group at Synopsys. "The advanced capabilities within the Synopsys Fusion Design Platform deliver the quality of results and time-to-result advantages that will enable our mutual customers to differentiate their high-performance compute designs."

Synopsys experts will discuss new features within the reference flow for HPC design optimized for Samsung Foundry's advanced processes at the upcoming at the upcoming Samsung Advanced Foundry Ecosystem (SAFE) Forum on October 28. For more information about the Synopsys Fusion Design Platform, visit https://www.synopsys.com/implementation-and-signoff/fusion-design-platform.html.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing application that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Editorial Contact:
Simone Souza
Synopsys, Inc.
650-584-6454
simone@synopsys.com

 

Cision View original content: http://www.prnewswire.com/news-releases/synopsys-and-samsung-foundry-collaboration-delivers-optimized-reference-methodology-for-high-performance-compute-designs-301161739.html

SOURCE Synopsys, Inc.

Contact:
Company Name: Synopsys, Inc., Samsung Foundry
Web: http://www.synopsys.com
Financial data for Synopsys, Inc., Samsung Foundry




Review Article Be the first to review this article
Featured Video
Editorial
More Editorial  
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Breaking Down Chip Design Functional Verification with Breker’s Adnan Hamid
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Welcome Back to DAC – in Person – in San Francisco
Vincent ThibautArteris IP Blog
by Vincent Thibaut
Why Automate Traceability?
Jobs
Principle Engineer (Analog-Mixed-Signal Implementation) for Global Foundaries at Santa Clara, California
Pre-silicon Design Verification Engineer for Intel at Santa Clara, California
Senior Staff Field Application Engineer for Global Foundaries at Santa Clara, California
Business Operations Planner for Global Foundaries at Santa Clara, California
Logic Design Engineer for Intel at Santa Clara, California
Upcoming Events
Semicon West Hybrid 2021 at Moscone North and South San Francisco, CA - Dec 7 - 9, 2021
67th Annual IEEE International Electron Devices Meeting at Hilton San Francisco Union Square hotel San Francisco - Dec 11 - 15, 2021
67th Annual International Electron Devices Meeting at Hilton San Francisco Union Square Hotel San Francisco, CA - Dec 13 - 15, 2021
DVCon India 2021 at India - Dec 14 - 16, 2021



© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise