Driving this move is a strong demand in Israel for Calypto’s register transfer level (RTL) power optimization and functional verification products. AST of Raanana, Israel, was selected because of its deep technical expertise and successful track record in the electronic design automation (EDA) market.
“AST has an excellent reputation and well-established relationships with many semiconductor companies,” says Doug Aitelli, Calypto’s vice president of worldwide sales. “AST will give Calypto an immediate, credible presence in Israel.”
Calypto’s advanced RTL power optimization and functional verification products, based on unique sequential analysis technology, dramatically reduce power and improve design quality. PowerPro™ CG (Clock Gating) is an automated RTL power optimization product that reduces power by up to 60%. Calypto’s SLEC™ (Sequential Logic Equivalence Checker) is the industry’s only proven sequential equivalence checker capable of comparing designs with differences in timing, state and levels of abstraction.
“Calypto’s PowerPro CG product offers unique capabilities to address the challenge of RTL power optimization,” remarks Uri Farkash, director of EDA Operations at AST. “We see tremendous opportunity for Calypto’s products within Israel.”
Advanced Semiconductor Technologies (AST) was established in 1986 as the first independent Application Specific Integrated Circuits (ASIC) Design Center in Israel. It represents today a group of world class companies in the areas of ASIC, Electronic Design Automation (EDA) and Application Specific Standard Product (ASSP). Its team of highly skilled sales and application engineers combine more than 100 years of experience. AST provides turn-key services as well as onsite support and consulting, in the areas of ASIC and FPGA Design and Verification, EDA and Configuration Management (CM) and other Design and Development. For more information, visit: www.ast.co.il.
Founded in 2002, Calypto Design Systems, Inc. empowers designers to create high-quality, low-power electronic systems by providing best-in-class power optimization and functional verification software, based on its patented sequential analysis technology. Calypto, whose customers include Fortune 500 companies worldwide, is a member of the Cadence Connections program, the IEEE-SA, Synopsys SystemVerilog Catalyst Program and the Mentor Graphics OpenDoor program. Calypto has offices in Europe, India, Japan and North America. Corporate Headquarters is located at: 2933 Bunker Hill Lane, Suite 202, Santa Clara, Calif. 95054. Telephone: (408) 850-2300. More information can be found at: www.calypto.com.
Calypto, PowerPro, SLEC and Enabling ESL are trademarks of Calypto Design Systems Inc. Other products and company names may be trademarks or registered trademarks of their respective companies.
Public Relations for Calypto Design Systems
Nanette Collins, 617-437-1822