Xilinx Demonstrates Next-Generation 100GE Interface with Best-in-Class Ecosystem Support at OFC/NFOEC Convention

Xilinx, NetLogic, Sarance, Avago & Ixia Showcase End-to-End 100GE Link for Core, Metro, Data Center & Access Aggregation Applications

SAN DIEGO, — April 03, 2009 — /PRNewswire/ -- Xilinx, Inc. (Nasdaq: XLNX) announced its participation at this week's OFC/NFOEC in San Diego, California, where the company will provide a live demonstration of its next-generation 100GE interface with best-in-class ecosystem support for core, metro, data center and access aggregation network applications.

(Logo: http://www.newscom.com/cgi-bin/prnh/20020822/XLNXLOGO)

What:       Live interoperability demonstration of 100Gbps of real
                 Ethernet traffic across the world's first single FPGA 100GE
                 solution for telecommunications equipment manufacturers
When:      March 24 and March 25 (10 a.m. to 5 p.m.)
                 March 26 (10 a.m. to 4 p.m.)
Where:     OFC/NFOEC Convention San Diego Convention Center, San Diego, CA.
Exhibit:     NetLogic Microsystems Booth #3045

At NetLogic booth #3045, Xilinx, NetLogic Microsystems, Inc., Sarance Technologies, Inc., Avago Technologies and Ixia will demonstrate 100Gbps of real Ethernet traffic across the world's first single-FPGA 100GE targeted design platform for telecommunications equipment manufacturers. This demonstration will showcase the Xilinx Virtex(R)-5 TXT FPGA, NetLogic NLP10142 100GE physical layer solution, Sarance HSEC 100GE MAC and PCS cores, Avago parallel optics, and Ixia 100GE Development Platform.

Altogether, the companies are demonstrating an end-to-end solution for design, development and test of an 802.3ba-compliant 100GE link, making it possible for today's leading telecommunications equipment manufacturers to accelerate time-to-market, enhance interoperability and reduce development expense for next-generation 100GE.

About Virtex-5 TXT FPGAs

The award-winning Xilinx Virtex-5 TXT FPGA is the world's first single-chip FPGA optimized for 40-Gigabit Ethernet, 100-Gigabit Ethernet, and other ultra high-bandwidth communication protocol bridging, switching and aggregation applications. Available now in production quantities, Virtex-5 TXT FPGAs take serial connectivity leadership to the highest level with 48 6.5Gbps multi-gigabit (GTX) transceivers and a more efficient implementation of the industry's first 100-GE media access controller (MAC). Delivering 600Gbps total bandwidth, Virtex-5 TXT FPGAs meet the stringent performance requirements for next generation telecommunications equipment, including 100GbE to 120Gbps Interlaken, 40Gbps Quad XAUI to 50Gbps Interlaken, OC-768 to OTU-3, and SFI-5 to 4xSFI4.2.

Designed to improve signal integrity and lower power consumption for reliable operation of 10/100Gbps links, Virtex-5 FPGAs are the foundational element of a targeted design platform for high-bandwidth protocol bridging, fully supported with application-specific IP, development tools and reference designs. Hardware enhancements unique to Xilinx transceivers reduce the size of the 100GE and Interlaken cores by over 20 percent.

For more information on Virtex-5 TXT FPGAs, available today in production quantities, go to: http://www.xilinx.com/products/virtex5/txt.htm.

About OFC/NFOEC 2009

The Optical Fiber Communication Conference and Exposition and The National Fiber Optic Engineers Conference introduce the most significant technical and commercial advances taking place in the global optical communications industry. The conference and exposition are the foundation of the optical communications field and bring together the people, products and information that drive technology from systems integration and enterprise solutions to service provider deployment. For more information, visit http://www.ofcnfoec.org.

About Xilinx

Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit http://www.xilinx.com.


Bruce Fienberg
Xilinx, Inc.
Tel.: 408-879-4631
E-mail: Email Contact

Review Article Be the first to review this article
Featured Video
More Editorial  
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
ESD Alliance/Accellera Panel Takes Executive View on Returning to the Office
Vincent ThibautArteris IP Blog
by Vincent Thibaut
Arteris IP Extends IP-XACT to UVM Testbenches
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Specification Automation for Designers
Business Operations Planner for Global Foundaries at Santa Clara, California
SerDes Applications Design Engineer for Xilinx at San Jose, California
Senior HID Sensor Algorithm Architect for Apple Inc at Cupertino, California
Circuit Design & Layout Simulation Engineer - Co-Op (Spring 2021) for Global Foundaries at Santa Clara, California
Design Verification Engineer II for Synopsys, Inc. at Mountain View, California
Logic Design Engineer for Intel at Santa Clara, California
Upcoming Events
DesignCon 2021 at San Jose McEnery Convention Center San Jose, CA San Jose CA - Aug 16 - 18, 2021
SEMICON Southeast Asia 2021 Hybrid Event at Setia SPICE Convention Centre Penang Malaysia - Aug 23 - 27, 2021
SEMI Europe Summit at Online, Central European Time Germany Germany - Sep 1 - 3, 2021
7th International Conference on Sensors & Electronic Instrumentation Advances (SEIA' 2021) at Palma de Mallorca, Mallorca balearic islands) Spain - Sep 14 - 16, 2021

© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise