MOUNTAIN VIEW, Calif., April 6 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced its new CustomSim(TM) circuit simulation solution. The best-in-class simulation technologies of NanoSim(R), HSIM(R) and XA have been unified into a single circuit simulation solution with added multicore capabilities delivering up to four times (4x) performance improvement for large analog and mixed-signal circuits. This comprehensive offering introduces native circuit checking into the analog/mixed-signal (AMS) domain. The new CustomSim solution forms part of the expanded Discovery(TM) 2009 Verification Platform.
The convergence of computing, consumer and mobile applications necessitates integrating complex digital and analog functions with increasing amounts of memory on a single chip. To verify these AMS designs, engineers need a unified circuit simulation solution that can efficiently verify different classes of circuits, including custom digital, analog and memory. Additionally, the solution needs to deliver the performance and accuracy required to efficiently simulate emerging design styles incorporating digitally-controlled analog functions such as RF transceivers, PLLs and Sigma Delta Converters. The CustomSim solution addresses these needs by unifying best-in-class simulation engines coupled with a Direct Kernel Integration to Synopsys' VCS(R) simulator for full-chip verification. The solution is integrated into a unified AMS verification environment simplifying usability through a common set of inputs, outputs, device models and debug.
"Our advanced CMOS image sensor designs utilize a large percentage of both analog and digital content, which traditional co-simulation solutions have been unable to verify due to capacity and performance limitations," said Erez Sperling, vice president of R&D at Advasense Technologies Ltd. "CustomSim has accelerated our transistor-level simulations by 10x over our previous simulator, and, with its direct kernel integration to VCS, has allowed us to quickly and accurately verify our designs and run simulations that were impossible to complete before."
Shrinking geometries and complex power management techniques have placed a considerable and increasing number of restrictions on the safe operating range of individual transistors and circuits. Designer productivity is negatively impacted by manually having to verify that these electrical rules are not violated. For example, ensuring that individual blocks are not susceptible to leakage power caused by floating gates and DC leakage paths cannot be done by simulation alone. CustomSim provides a complete circuit simulation solution that includes static and dynamic native design checking to rapidly identify electrical rule violations and power management failures, thereby increasing designer productivity and confidence.
"TranSwitch Corporation has developed complex mixed-signal semiconductor devices and IP cores, including HDMI, DisplayPort, Ethernet 1000/100/10 and CX4/LX4 technologies," said Genady Veytsman, Mixed Signal manager at TranSwitch. "Synopsys' CustomSim is the only unified transistor-level verification solution available that is able to efficiently verify all the different blocks in our design."
"The CustomSim solution is a significant milestone in the development of our circuit simulation technology, unifying our best-in-class circuit simulation engines," said Paul Lo, senior vice president and general manager of the Analog/Mixed-Signal Group at Synopsys. "CustomSim delivers a comprehensive AMS verification solution, including advanced design rule checking, reliability analysis and core engine performance, to address designers' toughest AMS verification challenges."
Discovery Verification Platform
The Discovery Verification Platform is an integrated AMS and functional verification solution with best-in-class technologies delivering high performance and scalability, including mixed-HDL and AMS simulation, debug, design checks, assertions, low-power verification, verification intellectual property (IP), code and functional coverage, testbench automation and formal analysis. Combined with support for industry-standard hardware design and verification languages, including SystemVerilog, Verilog, Verilog-AMS, VHDL, SystemC(TM), OpenVera(R) hardware verification language, UPF, the VMM methodology and related VMM Applications, the Discovery Platform enables verification engineers to achieve significantly higher productivity and faster verification closure times for their advanced AMS and digital chips. This contributes to first-time silicon success within required project cycles. The Discovery Platform is part of Synopsys' Software-to-Silicon Verification Solution, the most comprehensive suite of proven embedded software development, system validation, functional verification and circuit simulation software, hardware, IP, methodologies and services for complex system-on-chip (SoC) development.
Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
Synopsys, CustomSim, Discovery, HSIM, NanoSim, OpenVera and VCS are registered trademarks or trademarks of Synopsys, Inc. SystemC is a trademark of the Open SystemC Initiative and is used under license. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Editorial Contacts: Sheryl Gulizia Synopsys, Inc. 650-584-8635 Stephen Brennan MCA, Inc. 650-968-8900
Web site: http://www.synopsys.com/