Imaging and digital office solutions products place a wide range of demands on semiconductor design, including the need for higher efficiency, miniaturization and reduced power consumption. Ricoh's skilled CMOS analog, image processing, and information communications designers chose EDI System to ensure they would achieve the required high quality of silicon and fast time to market.
"Achieving the area, performance and power consumption targets becomes more challenging with every new project, and it is critical that our design software can scale to meet these increasing complexities," said Kazunobu Sugaya, Manager, Design Engineering Section, Imaging System LSI Development Center, Electronic Devices Company, Ricoh Co. Ltd. "We are pleased with the Encounter Digital Implementation System's native multi-mode, multi-corner timing optimization, signal integrity, and end-to-end multi-CPU design flow, which enable us to reach design closure more quickly than ever before."
At Siano, a maker of highly integrated silicon receivers for the mobile digital TV (MDTV) market, designers successfully develop high-performance chips to meet extremely challenging power consumption and die-size constraints. A multidisciplinary team of mixed-signal, power and wireless design specialists combined the company's proprietary algorithms with the Encounter Digital Implementation System and the CPF-based Cadence Low-Power Solution to produce leading-edge mobile entertainment technology.
"After our evaluation, we chose to adopt the full Encounter Digital Implementation and signoff system, as well the full Cadence Low-Power Solution," said Neil Feldman, director of RF and VLSI chip design at Siano. "The Encounter flow allows us to quickly achieve design closure and differentiate our products with a complex power shut-off methodology and a unique multi-supply voltage scheme. This project clearly demonstrated the benefits of Encounter technology and the Common Power Format."
"We are seeing design teams achieve better productivity, better quality of silicon, and faster time to market after switching to EDI System's integrated and scalable design closure solution," said Chi-Ping Hsu, senior vice president of research and development for the Implementation Products Group at Cadence. "It is gratifying to see a surge of technology-leading companies turn to Cadence to achieve differentiated results for their designs."
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
Cadence, the Cadence logo and Encounter are registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.
For more information, please contact: Dan Holden Cadence Design Systems, Inc. 408-944-7457 Email Contact