Synopsys Introduces IC Compiler In-Design Rail Analysis to Accelerate Design Closure

PrimeRail Technology in IC Compiler Identifies Voltage Drop and Electromigration Issues During Physical Implementation

MOUNTAIN VIEW, Calif., July 20 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today introduced its In-Design Rail Analysis(TM) capability to accelerate design closure. Part of Synopsys' IC Compiler in-design ecosystem, In-Design Rail Analysis utilizes embedded PrimeRail analysis and fixing guidance technology to enable designers to easily perform power network verification throughout physical implementation. By identifying and fixing voltage-drop and electromigration issues earlier in the flow, designers can eliminate costly iterations late in the design process. Working in concert with IC Compiler's Power Network Synthesis (PNS) and In-Design Physical Verification(TM) capabilities, In-Design Rail Analysis provides designers with a comprehensive solution for both the implementation and verification of power networks.

"Performing rail analysis and fixing within the IC Compiler place-and-route environment will greatly improve our designers' productivity, a significant benefit of Synopsys' Galaxy Implementation Platform," said Hitoshi Sugihara, Department Manager of DFM & Digital EDA Technology Development Department at Renesas Technology Corp. "We worked with Synopsys early in the development of this technology to ensure that it is easy to use, and have confirmed PrimeRail accuracy and correlation with HSPICE and silicon. We plan to standardize on a design methodology that takes advantage of In-Design Rail Analysis."

Traditional approaches to power network design consist of separate implementation and verification steps, often performed by different engineers using many tools and environments in a complex flow. With leading-edge system-on-chip (SoC) designs, this approach often results in multiple iterations between physical implementation and signoff, adding significant risk to project schedules. By eliminating complicated data exchanges and with no new tools to learn, In-Design Rail Analysis helps IC Compiler users ensure the integrity of their power network early and frequently during the physical implementation process, avoiding late-stage surprises close to tapeout. In-Design Rail Analysis works in tandem with IC Compiler's PNS capability to enable designers to efficiently implement, optimize and refine power networks, significantly reducing overdesign. In addition, In-Design Physical Verification helps ensure that power networks are design-rule clean as refinements and fixes are implemented. IC Compiler's ecosystem of PNS, In-Design Rail Analysis and In-Design Physical Verification today offers a fast and comprehensive solution for power network design.

"The charter of our IC Compiler in-design ecosystem is to bring advanced analysis and verification capabilities into the hands of place-and-route engineers," said Antun Domic, senior vice president and general manager, Synopsys Implementation Group. "Complementing our recent introduction of In-Design Physical Verification with IC Validator, In-Design Rail Analysis is the latest innovation aimed at significantly reducing design iterations which can seriously impact time-to-tapeout."

About Synopsys

Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at

Synopsys, Galaxy, HSPICE, In-Design Physical Verification and In-Design Rail Analysis are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

    Editorial Contacts:
    Sheryl Gulizia
    Synopsys, Inc.

    Lisa Gillette-Martin
    MCA, Inc.
    650-968-8900 ext. 115

SOURCE Synopsys, Inc.

Web site:

Review Article Be the first to review this article
DAC 2020

 True Circuits: Ultra PLL

Featured Video
Latest Blog Posts
Modesto (Mo) CasasGlobal Business in EDA
by Modesto (Mo) Casas
The Contingent Purchase Order Reassures Buyer and Seller
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Meet the New Cylynt, Fighting Software Piracy Around the Globe
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Smart Assembly of SoC Designs
Digital Design ASIC Manager for EDA Careers at RTP, North Carolina
Senior Physical Design/Layout Engineer for EDA Careers at EAST COAST, California
Senior Analog Design Engineers #5337 for EDA Careers at EAST COAST, California
Senior Application Engineer Formal Verification for EDA Careers at San Jose and Austin, California
Upcoming Events
57th Design Automation Conference 2020 at San Francisco CA - Jul 19 - 23, 2020
SEMICON West 2020 - Virtual Event at - Jul 20 - 23, 2020
Semicon Southeast Asia 2020 at MITEC Kuala Lumpur Malaysia - Aug 11 - 13, 2020
Drive World Conference & Expo at Santa Clara Convention Center Santa Clara CA - Aug 11 - 13, 2020
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers

© 2020 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise