VeriSilicon Delivers Chip Designs on Time and at Lower Cost With Cadence InCyte Chip Estimator

SAN JOSE, CA -- (MARKET WIRE) -- Jul 27, 2009 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation, announced today that VeriSilicon, a silicon solutions company based in China, has adopted the Cadence® InCyte Chip Estimator to help predict area, timing, power and cost requirements earlier in the design process, allowing design teams to make optimum decisions and accelerate their customers' time to market while reducing cost.

"The Cadence InCyte Chip Estimator product is embedded with foundry and ASIC library and IP information, which it uses to estimate chip size and power based on engineering calculations at the pre-architectural level," said Nianfeng Li, corporate vice president of design methodologies at VeriSilicon. "Our VeriSilicon team benefits from the ability to now estimate chip design and performance with higher accuracy than before, thereby reducing project risk."

VeriSilicon has an extensive track record of accelerating customer ASIC designs from initial specification to silicon, achieving first-pass silicon success -- on time and on spec. Because InCyte Chip Estimator leverages IP and foundry models from thousands of pieces of IP from more than 200 IP suppliers and foundries, designers at VeriSilicon can apply this data to achieve first-time silicon success by more accurately estimating die size and power in the architectural phase of the design cycle.

"Cadence InCyte Chip Estimator helps drive critical business decisions for our customers," said Adam Traidman, group director for Chip Planning Solutions at Cadence. "It accurately estimates chip size and power at the early architectural stage and leverages a rich catalog of IP. This technology also delivers optimized chip design and production cost estimates based on built-in algorithms and models, leveraged by IC sales teams side by side with their customers. InCyte can do this for virtually any design architecture, IP and silicon process node option."

The integrated IP catalog within the InCyte Chip Estimator is available at www.ChipEstimate.com. The tool uses the size and power information from the embedded library database with embedded chip estimation algorithms to estimate IC die size, dynamic power and leakage power. InCyte Chip Estimator also offers advanced power management techniques to define power modes, utilize power-saving techniques such as multi-supply voltage and power shut-off, compute the impact on power, and pass forward the power intent.

About Cadence

Cadence Design Systems, Inc. enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

About VeriSilicon

Founded in 2001, VeriSilicon Holdings Co., Ltd. ("VeriSilicon") is a fast growing IC (integrated circuit) design foundry providing custom solutions and SoC (System-on-A-Chip) turnkey services. VeriSilicon has an extensive track record of accelerating customer designs from initial specification to silicon, achieving first silicon success -- on time and on spec -- and taking customer silicon through volume production, utilizing its partner network of leading wafer foundries and assembly and test companies in Asia Pacific. In addition to its flexible engagement model, superior supply chain management, and strong service culture, VeriSilicon's market leading licensable digital signal processing (ZSP®) cores and star IP based SoC platforms, along with value-added mixed signal IP portfolio, are the key differentiators for its success in a broad range of application markets, including multimedia, voice and wireless communications. VeriSilicon's global customer base of market leading multinationals and fabless start-up companies benefit from shorter development cycles, reduced cost of ownership, and economies of scale. VeriSilicon currently has research and development centers in Santa Clara, California and Dallas, Texas, U. S.; Shanghai and Beijing, China; with sales and customer support offices in Santa Clara, California, US; Shanghai, Beijing, Shenzhen, China; Tokyo, Japan; Taipei, Taiwan; Nice, France; and Seoul, Korea. For more information, please visit www.verisilicon.com.

Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

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For more information, please contact:
Dan Holden
Cadence Design Systems, Inc.
408-944-7457

Email Contact

Bill Wang
Corporate VP of Business Development
VeriSilicon
408-844-8560

Email Contact





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