Teradici Chooses Synopsys as Its Primary EDA Partner

Broadened Cooperation Driven by Leadership in Tools, IP and Services

MOUNTAIN VIEW, Calif., July 28 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Teradici Corporation, a provider of groundbreaking PC-over-IP(R) technology, has signed an expanded business agreement to establish Synopsys as its primary EDA partner. As a result of the latest multi-year agreement, Teradici has consolidated on Synopsys' Galaxy(TM) Implementation and Discovery(TM) Verification Platforms for their implementation, verification and analog/mixed-signal flows, as well as extended their use of Synopsys DesignWare(R) IP cores and consulting services.

"Over the past several years, we have built a successful relationship with Synopsys by utilizing their best-in-class design tools, interface IP and design services to mitigate our project risks and accelerate the delivery of our breakthrough technology to our customers," said Maher Fahmi, vice president of Silicon Engineering and co-founder, Teradici Corporation. "As we grow our competencies in new areas such as analog design and simulation, we know we can continue to rely on the breadth and quality of Synopsys' technology and the outstanding support of its field and services teams."

"In today's challenging business climate, innovative chip developers like Teradici are looking for partners who will not only help them distinguish their products, but do so in a manner that makes them more efficient and productive across all their design flows," said John Chilton, senior vice president of marketing and strategic development at Synopsys. "Our broadened relationship enables Teradici to take advantage of Synopsys' growing technology and services portfolio so they can focus on developing and delivering their unique network-delivered computing products to the marketplace."

As part of the new agreement, Teradici has expanded access to products, services and IP from Synopsys, including the Galaxy Implementation Platform's IC Compiler place-and-route technology, Design Compiler(R) Ultra synthesis, Galaxy Custom Designer(TM) mixed-signal implementation, DFTMAX(TM) compression, TetraMAX(R) automatic test pattern generation, PrimeTime(R) SI signal integrity analysis, Star-RCXT(TM) parasitic extraction and Hercules(TM) physical verification; the Discovery Verification Platform's VCS(R), HSPICE(R), and HSIM(R) simulators for analog and digital verification, and MVRC and MVSIM for low power verification; and DesignWare IP for USB 2.0 and Ethernet.

About Synopsys

Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Synopsys, Design Compiler, DesignWare, DFTMAX, Discovery, Galaxy, Galaxy Custom Designer, Hercules, HSIM, HSPICE, PrimeTime, Star-RCXT, TetraMAX and VCS are trademarks or registered trademarks of Synopsys, Inc. PC-over-IP is a registered trademark of Teradici Corporation. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

    Editorial Contact:
    Yvette Huygen
    Synopsys, Inc.

    Investor Contact:
    Lisa Ewbank
    Synopsys, Inc.

SOURCE Synopsys, Inc.

Web site: http://www.synopsys.com/

Review Article Be the first to review this article

 Advanced Asembly

Featured Video
Roberto FrazzoliEDACafe Editorial
by Roberto Frazzoli
IBM’s 2nm chip; EDA updates; AI updates; acquisitions
More Editorial  
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Next Week’s Main Event: The ESD Alliance CEO Outlook
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Automating the UVM Register Abstraction Layer (RAL)
Pre-silicon Design Verification Engineer for Intel at Santa Clara, California
Technical Product Manager- SISW-EDA 238452 for Siemens AG at Fremont, California
Senior Staff Field Application Engineer for Global Foundaries at Santa Clara, California
Circuit Design & Layout Simulation Engineer - Co-Op (Spring 2021) for Global Foundaries at Santa Clara, California
Sr Engineer - RF/mmWave IC Design for Global Foundaries at Santa Clara, California
Test and Measurement System Architect for Xilinx at San Jose, California
Upcoming Events
DVCon China 2021 at Shanghai China - May 26, 2021
CadenceLIVE Americas 2021 at United States - Jun 8 - 9, 2021
DesignCon 2021 at San Jose McEnery Convention Center San Jose, CA San Jose CA - Aug 16 - 18, 2021
SEMICON Southeast Asia 2021 Hybrid Event at Setia SPICE Convention Centre Penang Malaysia - Aug 23 - 27, 2021
Verific: SystemVerilog & VHDL Parsers

© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise