Latest News from Apache Design Solutions - July 2011

Apache Spotlight

2011 DAC in Review

At this year’s Design Automation Conference in San Diego, Apache could be seen and heard throughout the conference at a number of venues.

In addition to hosting a variety of informative customer presentations in our suites including AMD, imec, MoSys, ST-Ericsson, ST, TSMC, and Xilinx, Apache's Power Team Experts presented our power, noise, and reliability solutions at the DAC Exhibitor Forum, and in some of our key eco-system partner’s booths. Apache was also featured in a popular panel discussion on 3D extraction technologies, its benefits, and usage at the DAC Pavilion.

The Apache Power Team Experts were also on-hand to present our leading Ultra-Low-Power, IP Integration, and Chip-Package-System Convergence methodologies along with our power analysis and optimization solutions, including PathFinder™ - EDN's Innovation Award winner for ESD integrity sign-off.

Additionally, Apache was proud to sponsor the DAC User Tracks again this year and co-hosted the successful Monday Night DAC Cocktail Party for attendees, exhibitors and guests.

If you missed Apache at DAC, you’ll want to catch up and join us for our upcoming Low-Power Webinar Series, starting July 19, and conveniently located on a computer near you!

Apache Low-Power Webinar Series

Apache Design Solutions’ Low-Power Webinar Series features our popular product presentations that were recently featured at DAC, including our comprehensive power methodologies for Power Budgeting, IP Integration and Chip-Package-System convergence.

Ultra-Low-Power Methodology
Tuesday July 19, 2011, 11:00AM – 12:00PM PDT

IP Integration Methodology
Thursday, July 21, 2011, 11:00AM – 12:00PM PDT

PowerArtist™ - RTL Power Analysis, Reduction, and Debug
Tuesday, July 26, 2011, 11:00AM – 12:00PM PDT

RedHawk™ - SoC Power Integrity and Sign-off for 28-nm Designs
Thursday, July 28, 2011, 11:00AM – 12:00PM PDT

Totem™ - Analog/Mixed-Signal Power Noise and Reliability
Tuesday, August 2, 2011, 11:00AM – 12:00PM PDT

PathFinder™ - Full-chip ESD Integrity and Macro-level Dynamic ESD
Thursday, August 4, 2011, 11:00AM – 12:00PM PDT

Chip-Package-System (CPS) Convergence Solution
Tuesday, August 9, 2011, 11:00AM – 12:00PM PDT

Sentinel™-PSI - IC-Package Power and Signal Integrity Solution
Thursday, August 11, 2011, 11:00AM – 12:00PM PDT

Upcoming Events

ASME InterPACK 2011
Portland, OR
July 6 - 8, 2011

Apache Low-Power Webinar Series
July 19 - August 11, 2011

EMC 2011
Long Beach, CA
August 16 - 18, 2011

Global Technology Conference 2011
Santa Clara, CA
August 30, 2011

In the News

Popular Whitepapers

  • Advanced Modeling Technologies for CPS Co-analysis/-optimization
  • RTL Design for Power Methodology
  • Power Noise Analysis for Next Generation ICs
  • PathFinder: Solution for Full-chip IC ESD Integrity
  • Power and Signal Line EM Design and Reliability Validation Challenges
  • Technologies for Power, Signal, Thermal, and EMI
  • Power and Noise Integrity for Analog/Mixed-Signal Designs

Download  Whitepapers from our website. Valid account required.

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