NanGate and Sagantec Collaborate to Automate Standard Cell Library Creation at 14nm-22nm

Sagantec Announces nmigrate™

Sagantec acquires NP-Komplete Technologies

Sagantec Enables MathStar To Migrate Field Programmable Object Arrays to Next Technology Node

Sagantec and Time to Market Team up to Offer Design Migration Solutions

Sagantec and TSMC Collaborate on Sagantec DFM-Fix

e-con Systems

Mark Gilbert, President EDA Careers

Onn Haran, CTO Autotalks

EDACafe Editorial by Roberto Frazzoli EDA Q3 figures; Achronix to list on Nasdaq; automotive chip shortage; SMIC added to Entity List; AI updates

EDACafe Editorial by 2021 EDACafe Predictions Electronic Design Industry Predictions – Lanza techVentures

Bridging the Frontier by Paul Cohen Electronic System Design Reports 15% Q3 Revenue Growth; IP, Asia Pacific Surpass $1B

IC Insights by IC Insights IC Insights Bulletin: China Forecast to Fall Far Short of its “Made in China 2025” Goals for ICs

Embedded Software by Colin Walls Questions on data representation

SerDes Applications Design Engineer for Xilinx at San Jose, California

Senior HID Sensor Algorithm Architect for Apple Inc at Cupertino, California

Senior Analog IC Design Engineer for Marvell Semiconductor at Santa Clara, California

Entry Level Design Verification Engineer for Cirrus Logic, Inc. at Austin, Texas

Senior Application Engineer Formal Verification for EDA Careers at California or Austin, California

ASIC Engineer for Amazon at seattle, Washington

Si2 AI/ML Winter Workshop at United States - Jan 29, 2021

virtual DATE 2021 at France - Feb 1 - 5, 2021

SEMI Technology Unites Global Summit at United States - Feb 15 - 19, 2021

DVCon U.S. 2021 at Virtual - Mar 1 - 4, 2021