Mentor Graphics Veloce Emulation Platform Used by Starblaze for Verification of SSD Enterprise Storage Design

Mentor Graphics Launches New Xpedition Enterprise Platform to Address Rigid-Flex and High-Speed Design Challenges

Kaynes Technology Implements Lean NPI Flow using Mentor Graphics Software

Mentor Graphics Verification Academy Adds SystemVerilog Course and Patterns Library to Expand Engineers' Expertise and Resources

Mentor Graphics Veloce Emulation Platform Helps Barefoot Networks Verify the World's First Fully Programmable Switch

Dr. Cheryl L. Shavers Elected to Mentor Graphics Board of Directors

Vic Kulkarni, VP ANSYS

e-con Systems

Mark Gilbert, President EDA Careers

EDACafe Editorial by Roberto Frazzoli EDA Q3 figures; Achronix to list on Nasdaq; automotive chip shortage; SMIC added to Entity List; AI updates

EDACafe Editorial by 2021 EDACafe Predictions Electronic Design Industry Predictions – Lanza techVentures

Bridging the Frontier by Paul Cohen Electronic System Design Reports 15% Q3 Revenue Growth; IP, Asia Pacific Surpass $1B

IC Insights by IC Insights IC Insights Bulletin: China Forecast to Fall Far Short of its “Made in China 2025” Goals for ICs

Embedded Software by Colin Walls Questions on data representation

Staff SerDes Applications Design Engineer for Xilinx at San Jose, California

Senior Analog IC Design Engineer for Marvell Semiconductor at Santa Clara, California

Pre-silicon Design Verification Engineer for Intel at Santa Clara, California

SerDes Applications Design Engineer for Xilinx at San Jose, California

Senior Application Engineer Formal Verification for EDA Careers at California or Austin, California

Product Line Manager for EDA Careers at Multiple, North Carolina

Si2 AI/ML Winter Workshop at United States - Jan 29, 2021

virtual DATE 2021 at France - Feb 1 - 5, 2021

SEMI Technology Unites Global Summit at United States - Feb 15 - 19, 2021

DVCon U.S. 2021 at Virtual - Mar 1 - 4, 2021