eSilicon to debut AI Accelerator software and a new chiplet model at Hot Chips 2019

eSilicon, Samtec and Wild River Technology Offer High-Performance Communications Webinar

eSilicon to Participate in Panel Discussion on Chiplet Design Experience at a Workshop presented by the Open Compute Project (OCP)

eSilicon Tapes Out 7nm Combo PHY (HBM2/HBM2E/Low Latency) Test Chip

Samsung Foundry Forum 2019: eSilicon to unveil 14nm switching and 5G infrastructure ASICs

 eSilicon Tapes Out 7nm neuASIC IP Platform Test Chip

Vic Kulkarni, VP ANSYS

Paul Cunningham, Corporate VP and GM Cadence

Yoan Dupret, Managing Director Menta

EDACafe Editorial by Roberto Frazzoli Intel’s new CEO: comments from media and analysts

EDACafe Editorial by 2021 EDACafe Predictions PRFI Predictions for 2021

IC Insights by IC Insights Industry R&D Spending To Rise 4% After Hitting Record in 2020

Embedded Software by Colin Walls Libraries – a good way to promote embedded code reuse?

Bridging the Frontier by Paul Cohen Electronic System Design Reports 15% Q3 Revenue Growth; IP, Asia Pacific Surpass $1B

Staff SerDes Applications Design Engineer for Xilinx at San Jose, California

Senior HID Sensor Algorithm Architect for Apple Inc at Cupertino, California

Physical Design Engineer for Cirrus Logic, Inc. at Austin, Texas

Technical Marketing Mmanager for EDA Careers at Fremont, California

ASIC Engineer for Amazon at seattle, Washington

Senior Java Developer/Architect for EDA Careers at Varies, North Carolina

Si2 AI/ML Winter Workshop at United States - Jan 29, 2021

virtual DATE 2021 at France - Feb 1 - 5, 2021

SEMI Technology Unites Global Summit at United States - Feb 15 - 19, 2021

DVCon U.S. 2021 at Virtual - Mar 1 - 4, 2021