Patent-pending technology creates multiple electrically-correct layouts directly from schematics, allowing designers to quickly explore multiple results concurrently
SAN JOSE, Calif. — (BUSINESS WIRE) — May 21, 2014 — Existing approaches to automating analog and custom digital integrated circuit (IC) designs have attempted to improve on portions of the design flow, but have not managed to generate manual-quality layout without significant user intervention. Pulsic, the premier provider of innovative physical design tools for custom design automation, has drawn on over a decade of experience helping leading-edge customers with physical design challenges to deliver a completely automated solution that overcomes the problem of not-as-good-as-manual analog and custom-design layout.
Pulsic Animate is the first complete automated layout system built from the ground up for transistor-level analog and custom-digital design. Animate offers designers a simple, easy-to-use layout solution that delivers multiple layouts from a schematic using automatic constraint extraction and considers place and route concurrently, producing optimal-quality results. Animate automatically generates constraints based on netlist topology analysis, eliminating the need for time-consuming manual constraint entry and management.
Unlike any other analog layout system, Animate employs novel patent-pending PolyMorphic LayoutTM technology with a database and algorithmic architecture that derives many potential layout variations for a design. These variations crystallize into multiple, complete, DRC/LVS-correct layouts in minutes. Designers can explore these complete layout options in a fraction of the time needed to produce just a single layout option by hand. Since Animate produces layout results so quickly, parasitics are available for simulation early in the design process, further speeding the entire design cycle. Animate places and routes simultaneously, ensuring that each process is informed by the other and that manual-quality results are achieved.
As geometries shrink, and as leading-edge processes such as FinFETS reach the market, manual analog design is no longer sufficient, said Mark Williams, co-founder and CEO, Pulsic. To get routable placement, you need to know what the routing will look like, but if you place and then route, you cant know this. As DRC rules increase, iterations between layout and design are becoming onerous, but with Animate, you can generate multiple layouts, extract them all, and then choose the optimal one for the desired performance criteria. A much bigger problem space can be explored, with better results.
How Pulsics approach delivers the automation that analog designers need
Pulsic has developed an entirely new approach to transistor-level layout: PolyMorphic Layout. The patent-pending database and algorithmic architecture inherent in PolyMorphic Layout is what allows Animate to generate all possible layout solutions, prune out those that do not fit designers criteria, and arrive at multiple optimal solutions. The result is a set of best layouts by criteria (e.g., area) along with the next 10% best solutions.
Animate requires no arduous set-up. A simple graphical user interface guides the user through the flow and enables designers to visualize layout options quickly. Constraints are derived automatically, but can be edited by the user quickly and easily.
Designers can use Animate at an early design stage, with minimal constraints, to explore possible layout architectures and extract early parasitics for simulation of layout-dependent effects (LDE). This approach can also provide far more accurate analog block/design size estimation during floorplanning than has ever previously been possible.
With Animate, transistor-level designers gain not only the productivity of automation, but also the ability to explore many more design options, faster than ever before. The final result is comparable to that of an expert manual layout, but is produced in a fraction of the time. For additional information on Animate, please see detailed datasheet.
Pulsic will be highlighting Animate in booth #1713 at the upcoming Design Automation Conference (DAC), June 1-5, 2014 in Moscone Center, San Francisco, California. To register for a private demonstration of Animate or any of Pulsics Automated Full Chip Layout Solutions at DAC, please visit https://www.secure-register.net/register.php?event=12628.
Pulsic is an electronic design automation (EDA) company offering production-proven chip planning and implementation solutions for extreme design challenges at advanced nodes. Leading semiconductor companies use Pulsics physical design software to achieve significant improvements in their design productivity through layout automation using Pulsics advanced solutions. Complementary to existing design flows, standards, and databases, Pulsic technology delivers handcrafted quality results faster than manual design or other EDA software solutions. Pulsic has delivered successful tapeouts for IDMs and fabless customers in the memory, FPGA, custom digital, LCD, imaging, and AMS markets worldwide. For more information, please visit http://www.pulsic.com. Follow us on twitter @Pulsic.
Unity, Pulsic Planning Solution, Pulsic Implementation Solution, PolyMorphic Layout and Animate Design Solution are trademarks of Pulsic Limited. Any other trademarks or trade names mentioned are the property of their respective owners.
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Michelle Clancy, 252-940-0981