NXP Semiconductors Reports First Quarter 2016 Results

Note: 

  1. As a result of the Freescale Semiconductor (“Freescale”) Merger, NXP has included previously reported Freescale product group revenue into its various existing High Performance Mixed Signal (HPMS) and Standard Products (STDP) segments. As of the fourth quarter 2015, the NXP HPMS business lines include the following (1) Automotive, which includes revenue from Freescale’s Automotive MCU and Analog & Sensor product groups; (2) Secure Connected Devices, which includes revenue from Freescale’s Microcontroller product group; and (3) Secure Interface & Infrastructure, previously known as Secure Interface & Power which includes revenue from Freescale’s Digital Networking and RF product groups.  Additionally, certain portions of Freescale’s Analog & Sensor product group and Other revenue is apportioned to various NXP business lines consistent with NXPs prior product and revenue classification approach, this included product-functionality alignment as well as intellectual property (IP) sales and licensing revenue. 

  2. The preceding table sets forth our unaudited combined adjusted quarterly financial information, including estimates of segment and relative business line allocations, for the three month periods ended April 3, 2015, December 31, 2015 in addition to the as reported information for the three month period ended April 3, 2016.  This combined adjusted financial information has been derived from the audited consolidated financial statements of NXP for the years ended December 31, 2015 and the unaudited condensed consolidated financial statements of Freescale for the period ended April 3, 2015. In each case, we have excluded revenue generated in our RF Power business, which was divested in connection with the closing of the Freescale Merger on December 7, 2015, and our Bi-Polar business, which was divested on November 9, 2015 but have not otherwise made adjustments to the historical figures.  In addition, the following information does not give effect to the financial impact on our statement of operations for any other acquisitions or divestitures made by NXP or Freescale during the periods presented.

    The unaudited combined adjusted financial information and segment allocation in the preceding table represent NXP management’s current estimate of the combined financial information based on historical financial information of NXP and Freescale. This unaudited combined adjusted financial information has been presented for informational purposes only and is not necessarily indicative of what the combined company’s results of operations actually would have been had the Freescale Merger been completed as of the dates indicated. In addition, the unaudited combined adjusted financial information does not purport to project the future financial position or results of operations of the combined company and do not reflect synergies that might be achieved from the combined operations.

    The unaudited combined adjusted financial information in the preceding table has not been prepared in accordance with the requirements of Regulation S-X of the U.S. Securities Act or US GAAP. Neither the assumptions underlying the adjustments nor the resulting adjusted financial information have been audited or reviewed in accordance with any generally accepted auditing standards. The information presented should be read in conjunction with the historical consolidated financial statements of NXP and Freescale, which are filed with the SEC.

  3. Combined adjusted revenue is the combined consolidated revenue of NXP and Freescale for each of the quarterly periods presented. The information excludes the divestment of previously announced business and the creation of joint-ventures.  The unaudited adjusted financial information has been prepared for comparative purposes only and does not purport to be indicative of the revenue performance that would have been achieved had the acquisition taken place at the beginning of the periods shown.  In addition, this information is not intended to be a projection of future results from the combined operations.
     
  4. Combined adjusted product revenue is the combination of revenue from the High Performance Mixed Signal (HPMS) and Standard Products (STDP) segments. Percent of quarterly total amounts may not add to 100 percent due to rounding

Guidance for the Second Quarter 2016: ($ millions) (1)

    Low   Mid   High  
         
  Product Revenue  $     2,247    $     2,297    $     2,347    
         
 Q-Q  3%  5%  7% 
         
 Other Revenue $  48  $  48  $  48  
         
  Total Revenue  $     2,295    $     2,345    $     2,395    
                 
  Q-Q     3 %     5 %     8 %  
                 
  Non-GAAP Gross Profit   $     1,137     $     1,172     $     1,209    
                 
  Non-GAAP Gross Margin     49.5 %     50.0 %     50.5 %  
                 
  Non-GAAP Operating Income     $     573     $     592     $     614    
                 
  Non-GAAP Operating Margin     25.0 %     25.3 %     25.6 %  
                 
  Interest Expense   $   (88 )   $   (88 )   $   (88 )  
                 
  Cash Taxes   $   (17 )   $   (18 )   $   (19 )  
                 
  Non-controlling Interest   $   (13 )   $   (14 )   $   (15 )  
                 
  Non-GAAP Net Income   $     455     $     472     $     492    
                 
  Ave. Diluted Shares       351         351         351    
                 
  Non - GAAP EPS   $     1.30     $     1.35     $     1.40    
                 

« Previous Page 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9  Next Page »



Review Article Be the first to review this article
Aldec

Design Tips for Heavy Copper PCBs

Featured Video
Jobs
Senior Layout Engineer for EDA Careers at EAST COAST, California
Senior and (less) Senior Design Verification Engineers for EDA Careers at San Jose and Austin, California
Senior Account Managers… FORMAL VERIFICATION...VALLEY for EDA Careers at San Jose, California
Senior Analog Design Engineers #5337 for EDA Careers at EAST COAST, California
Upcoming Events
Embedded Vision Summit 2020 at Santa Clara Convention Center Santa Clara CA - May 18 - 21, 2020
Sensors Expo & Conference at McEnery Convention Center 150 W. San Carlos Street SAN JOSE CA - Jun 22 - 24, 2020
Nanotech 2020 Conference and Expo at National Harbor MD - Jun 29 - 1, 2020
IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2020 at Limassol Hotel, Amathus Area, Pareklisia Cyprus - Jul 6 - 8, 2020
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers



© 2020 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise