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RISC-V ISA and Foundation Overview
- Speaker: Rick O’Connor, RISC-V Foundation
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RISC-V – A Diversity of Core and Accelerator Choices
- Speaker: Markus Levy, NXP
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RISC-V OS Landscape
- Speaker: Palmer Dabbelt, SiFive
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Designing a Custom RISC-V Core Using Chisel
- Speaker: Alex Badicioiu, NXP
Members of the RISC-V Foundation are participating in additional sessions including:
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Core
Choices: How To Navigate The Brave New World Of IP (Panel)
- When: Tuesday, June 26 from 3:00 p.m. – 3:45 p.m. PT (Booth 2161)
- Key Panelist: Rick O’Connor, RISC-V Foundation
- Other Panelists: John Ronco, Arm; Majid Bemanian, MIPS Technologies; and Markus Levy, NXP Semiconductors
- Moderator: Junko Yoshida, EE Times
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A
New Golden Age For Computer Architecture: Domain Specific Accelerators
And Open RISC-V (Keynote)
- When: Wednesday, June 27 from 9:20 a.m. – 10:00 a.m. PT (Room 3008)
- Speaker: David A. Patterson, vice chair of the RISC-V Foundation Board of Directors; Google Inc. and University of California, Berkeley
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PULP-HD:
Accelerating Brain-Inspired High-Dimensional Computing on a Parallel
Ultra-Low Power Platform (Research Reviewed)
- When: Wednesday, June 27 from 3:30 p.m. – 5:30 p.m. (Room 3022)
- Speaker: Fabio Montagna, University of Bologna, Italy
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Computing
Minus Moore’s Law = ?!?! (Panel)
- When: Wednesday, June 27 from 4:30 p.m. – 5:30 p.m. PT (Room 3024)
- Key Panelist: Krste Asanovic, chairman of the RISC-V Foundation Board of Directors; University of California, Berkeley and SiFive
- Other Panelists: Kathy Wilcox, Advanced Micro Devices; David Brooks, Harvard University and Facebook; Yuan Xie, University of California, Santa Barbara
- Moderator: Todd Austin, University of Michigan