Achieve DO-254 Compliance with the Industry’s Most Comprehensive HDL Coding Guidelines

Event Info

EU Session
3:00 PM – 4:00 PM CEST
Thursday, March 25, 2021
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US Session
 11:00 AM – 12:00 PM PT
Thursday, March 25, 2021
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Presenter  

Bio:

Alexander Gnusin, Design Verification Technologist. Alex accumulated 25 years of hands-on experience in various aspects of ASIC and FPGA design and verification. His employees list includes IBM, Nortel, Ericsson and Synopsys Inc. As Verification Prime for a multi-million gates project, he combined various verification methods - LINT, Formal Property checking, dynamic simulation and hardware-assisted acceleration to efficiently achieve design verification goals. He received his M.S. in Electronics from Technion, Israel Institute of Technology.



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