Statistical Static Timing Analysis: How simple can we get? - Technical Paper from DAC 2005

Intel

Paper by Chirayu S. Amin, Noel Menezes, Kip Killpack, Florentin Dartu, Umakanta Choudhury, Nagib Hakim, and Yehea I. Ismail.

With an increasing trend in the variation of the primary parameters affecting circuit performance, the need for statistical static timing analysis (SSTA) has been firmly established in the last few years. While it is generally accepted that a timing analysis tool should handle parameter variations, the benefits of advanced SSTA algorithms are still questioned by the designer community because of their significant impact on complexity of STA flows. In this paper, we present convincing evidence that a path-based SSTA approach implemented as a post-processing step captures the effect of parameter variations on circuit performance fairly accurately. On a microprocessor block implemented in 90nm technology, the error in estimating the standard deviation of the timing margin at the inputs of sequential elements is at most 0.066 FO4 delays, which translates in to only 0.31% of worst case path delay.


Read the complete story ...
Rating:
Reviews:
Review Article
  • October 09, 2008
    Reviewed by 'Sadiq'
    Statistical Static Timing Analysis: How simple can we get? - Technical Paper from DAC 2005


      Was this review helpful to you?   (Report this review as inappropriate)


For more discussions, follow this link …
Aldec


Featured Video
Latest Blog Posts
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Functional Safety and Security in Embedded Systems
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Phil Kaufman Award Goes on Hiatus for 2020
Colin WallsEmbedded Software
by Colin Walls
Why develop embedded software bottom up?
Jobs
ASIC Design Engineer, for Apple Inc at Cupertino, California
Senior Application Engineer Formal Verification for EDA Careers at San Jose and Austin, California
Test Engineer for Marvell Semiconductor at Santa Clara, California
Wireless ASIC Design Engineer for Apple Inc at Cupertino, California
Director Technical and Corporate Marketing for EDA Careers at San Jose, California
IC Design Engineer - SoC Integration for Xilinx at San Jose, California
Upcoming Events
Accellera Day India 2020 at Online Event India - Dec 2 - 3, 2020
RISC-V Summit 2020. at United States - Dec 7 - 10, 2020
SEMICON Japan 2020 Goes Virtual at Japan - Dec 11 - 18, 2020
IPC APEX EXPO 2021 at San Diego Convention Center san diego - Mar 6 - 11, 2021
TrueCircuits:



© 2020 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise