I won't say this is a sleek, efficient, or optimized pre-conference presentation on DAC, but I will say that if you read it top to bottom, you'll have a scatter-shot impression of what some (but not all) of your opportunities will be from July 23rd through July 28th in and around Moscone Center - and what you should be thinking about while you're partaking of those opportunities. Enjoy!
Rajeev Madhavan, Chairman & CEO at Magma Design Automation - [I spoke with Rajeev by phone on July 7th. I was in Silicon Valley; he was visiting family in Southern India, having just come from meetings in Japan, Taiwan, and China.]
This year at DAC, we are basically the technology leader and will have a whole bunch of announcements and demonstrations going on at 65 nanometers, and even 45 nanometers. Unlike other EDA companies who buy their technology, ours is home grown. Typically, EDA companies grow through acquisition, but Magma likes to buy companies either very early in development or develop the technology ourselves.
There is a growing EDA industry in India. I have just come from a week in Bangalore and Hyderabad, where I met with many EDA and IP start-ups. They were looking for help and advice from me, and I found at least a couple of them doing innovative tools. Actually, I've never seen EDA start-ups in India before. I've seen IP start-ups in the analog [area], but never EDA start-ups. These companies are trying to write their own tools, but they are [somewhat] poor at business. They need expertise in raising money, and moving from mom-and-pop shops to [larger enterprises]. There are some big mistakes being made, so many are bound to fail. But, by the next generation of companies, there may be some that succeed who will add quite a bit of value [to the EDA industry] here. It will take time, but it will happen.
There is a huge amount of design being done here in India. Many global companies are here - Texas Instruments, Infineon, and many other customers. There is also a [growing] ability to write software tailored to these companies. And, cutting-edge designs are being done here, 65-nanometer designs. It's definitely happening - you have very complex chips being done here now. The design teams are fighting to do [more and more] of the cutting-edge designs.
So, with those design skills here and the software skills here, innovation in EDA is bound to happen here as well, because there's tremendous drive to do it. We see it in our own R&D team here in India. Several patentable inventions have happened here, and there are bright, young kids here with energy being managed by our team in Santa Clara. Now, we need to build more managers here in India. [That will happen] over the next 2 years or so. We need to be able to manage our growing talent pool here.
Magma is truly an international company, and yes we do also have an office in Beijing. We have 13 or 14 people there writing code, and experimenting in one or two areas. However, as with [all international companies], English is the lingua franca - which works in India. In China, however, I still need an interpreter. English is still not widely spoken and we have some difficulty managing our team in China from Santa Clara. Clearly, English is an advantage [that India has over China].
The other problem is that no one is really doing 65 or even 90-nanometer designs in China. At Magma, we 'go in the door' of our customers when they are doing cutting-edge designs. But when you're doing older geometries, you're using older tools. There is one other difference in China. In India, most of our customers are U.S. or European-based companies with operations there. In China, the customers are companies that are [state-owned]. I hope the Chinese government will relax a bit [going forward], to allow for a more free economy, but it's difficult to do that in that environment. So, we see our business continuing to increase in India because of the multinationals, [more so] than in China for now.
It does require a lot of travel on the part of management, but [we are growing] our local management and our local talent pool in these areas - people who know how to write and support EDA software. And yes, absolutely - human interaction across the teams [and geographies] is required! But that's one thing we have always done well, to [promote interaction] across teams. On a quarterly basis, we fly 80-to-90 percent of the company into Santa Clara to make sure that everyone gets it when change in happening. [Similarly, of course], DAC definitely helps Magma. It's a good opportunities for us to bring our users together. We organize ourselves at DAC to do that, and we do it well.
Accellera Technical Excellence Award - The standards body has named verification expert Harry Foster as the 2006 recipient of the organization's 3rd annual Technical Excellence Award for his contributions to Accellera's Open Verification Library (OVL) standard. The award will be presented at Accellera's Open meeting at DAC on Wednesday, July 26th, at 10 AM in the Marriott Hotel's Golden Gate Room B2. You should go, if you know and admire Harry (and who doesn't?), and/or you know that the OVL library standard includes assertion checkers used by design, integration, and verification engineers to check design behavior with simulation, emulation and formal verification tools. Harry Foster is the inventor of OVL and was a driving force behind the movement to make it a standard, where it has brought about fundamental changes in the verification industry, and the move towards Assertion-Based Verification (ABV). Harry is principle engineer for the Mentor Graphics Design, Verification, and Test division, and serves as chair of the IEEE 1850 Property Specification Language (PSL) working group.
Adam Traidman, President at Chip Estimate - We have formed a foundry partner program. Chartered Semiconductor Manufacturing is the first foundry to join. Chartered customers will now be able to go to www.ChipEstimate.com and search for IP from Chartered IP partners, as well as through a link from Chartered’s website. These IP partners have developed IP spanning several generations of Chartered’s technologies, including advanced technologies using 90-nanometer and 65-nanometer processes. At ChipEstimate.com, design teams can view a list of Chartered IP partners, view those partners’ IP datasheets, and review IP status in silicon. By leveraging our IP search capabilities, Chartered’s customers can easily locate the comprehensive IP options available to them.