SoftJin announced NXCompare, a geometrical comparison tool that compares any two layout and/or mask databases, which may be in different formats, have different hierarchies, or come from different sources. The product includes: cross-format comparison support for multiple standards, including GDSII, OASIS, MEBES, OASIS.VSB and OpenAccess; distributed computing, “unlimited” data handling capacity, and user-defined tolerance.
SoftJin also announced Nirmaan 3.0, an upgraded version of the company’s software development toolkit for developers of post-layout and DFM/DFY tools. The company says the new release provides a 10X performance improvement over previous versions in run-time speed-up, reduced memory utilization, and reduced output file sizes.
Sondrel Ltd. announced Helium, a design-flow automation and management environment that the company says supports the in-house and manpower IC implementation services Sondrel offers to its customers. Per the Press Release: “Helium helps designers to manage complex tasks by automating steps in the design flow, resulting in enhanced productivity and reduced risk.”
Sonics Inc. announced a partnership with JEDA Technologies to “utilize JEDA’s SystemC OCP Checker to validate the interoperability of SystemC models of Sonics SMART Interconnect solutions. Sonics will also provide JEDA with these SystemC models to support JEDA’s development and application engineering requirements JEDA’s OCP Checker was developed and tested according to the current OCP specifications.”
Synopsys and Zuken announced a partnership to develop a PCB design and simulation “solution“. The companies say the results will combine “two complementary product lines, the Synopsys Saber Simulator and the Zuken CR-5000 System Designer, to deliver a platform for integrated system-level electronic design, simulation and verification Zuken and Synopsys have also established an In-Sync agreement enabling mutual promotion and development work Development teams from both companies will use Synopsys’ Frameway technology to create a bi-directional interface between the complementary toolsets. Customers will use System Designer to create their designs, and then directly launch Saber simulations from within the CR-5000 environment.”
Synopsys announced compliance of its PCI Express and certification of its USB 2.0 IP “solutions” for the Common Platform technology available from IBM, Chartered Semiconductor Manufacturing, and Samsung Electronics. Synopsys says this IP has been “implemented in the 65-nanometer Common Platform process.”
Synopsys has clearly been busy, because they also announced that IBM has added support for topographical technology in its 90 nanometer and 65 nanometer-based ASIC design kits.
Teklatech announced $1.5 million in funding. Per the Press Release: “Recognizing the need to address increasing on-chip variability at early chip design stages, Teklatech has developed an innovative approach to top-level clock distribution. The technology makes it possible to implement ultimately scalable, globally synchronous systems. It enables a modular approach to system-level clock distribution and timing validation.”
Tensilica and SRS Labs announced that SRS Labs has ported its TruSurround HD virtual sound audio technology to Tensilica’s HiFi 2 Audio Engine for Xtensa processors and the Diamond Standard 330HiFi Audio Processor.
Tensilica also announced it has optimized the MP3 decoder for its Xtensa HiFi 2 Audio Engine and Diamond Standard 330HiFi processor core. Per the Press Release: “This MP3 decoder now runs at the lowest power and is the most efficient in the industry, requiring just 5.7 MHz when running at 128Kbps, 44.1 KHz and dissipating 0.45 mW in TSMC’s 65-nanometer LP process (including memories).”
TurboTools Corp. announced an integration link with Autodesk Inventor 2008. The company also announced that CablEquity 2007 has been certified for Autodesk Inventor 2008 under the Autodesk Inventor Certified Applications Program.
UMC opened a new R&D center for nanometer technologies, which the company says will focus on technologies for 300mm manufacturing and is adjacent to Fab 12A at UMC’s Tainan Science Park site. UMC says the center will have 1,000+ employees when fully operational, most of which will consist of R&D engineers.
VaST Systems announced a partnership with the Automotive Business Unit of Renesas Technology Corp. that the companies say will “develop and deliver virtual prototypes of Renesas high-performance processor platforms using VaST technology. The platforms will be used by mutual customers worldwide for software development, architectural analysis, and system verification The partnership will initially focus on enhancements to SH2A and R32C-based platforms, with customer releases available in October of 2007.”
Visible Assets Inc. announced a strategic investment from Epson Electronics America. Do you know that “RuBee technology, from Visible Assets, is a low-frequency visibility network protocol that differs from conventional RFID tags because they can be as thin as 1.5 mm, operate for up to 10 years using a coin-sized lithium ion battery, and work in underwater and underground environments that obstruct higher-frequency RFID signals.”
X-FAB Silicon Foundries announced sales of $85.4 million in the first quarter of 2007, up 53.0 percent from the same period last year. The company says the growth is due primarily to expansion through X-FAB Sarawak, and notes this Malaysian site was not included in the consolidated figures until September 2006. Compared to the fourth quarter of 2006, which includes X-FAB Sarawak, sales increased by approximately 11.5 percent.
Xoomsys announced a second round of funding to the tune of $8 million. DAG Ventures led the round, with participation from existing investors Benchmark Capital and Morgenthaler Ventures. The parties involved say the new funding will “enable Xoomsys to expand its engineering and sales and support teams as it prepares for wide deployment of its breakthrough solution.”
Zuken announced version 10.0 of its CR-5000 PCB design suite, which the company says supports high-speed technology and devices including DDR memory and high-density FPGAs.
Zuken also announced working with Aldec to create a combined design and verification flow for “flexible” FPGAs on PCBs. The companies say “the partnership will focus integration efforts on Zuken's enterprise-wide PCB design suite, CR-5000 Initial development will allow designers to launch Aldec's mixed-language simulation technology from within CR-5000 System Designer for access to project-specific design data.”
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Peggy Aycinena is Editor of
EDA Confidential and a Contributing Editor to
EDA Weekly.