MOUNTAIN VIEW, Calif.—(BUSINESS WIRE)—July 24, 2007— Apache Design Solutions, the technology leader in SoC power integrity today announced that the company has achieved its 18th consecutive quarter of record sales with over 15% growth from the previous quarter and 50% growth from Q2 of the previous year, while continuing profitability. In addition, Apache opened two new R&D centers in Hsin-chu, Taiwan and Shanghai, China. These development centers are in addition to the existing R&D centers in Chengdu, China and Bangalore, India.
Recognizing power as a system-wide challenge, not just an IC
related issue, Apache recently introduced Sentinel; a combined
chip-package power and I/O integrity solution. Sentinel for Chip Power
Model (CPM) and I/O-SSO are being used by early adopters to solve
their IC-Package co-design needs.
"We are scaling our business and technology to address the
critical 45 / 32 nm silicon integrity challenges for digital SoC,
memory, and mixed-signal designs," said Andrew Yang, CEO of Apache.
"The global expansion strategy is a critical part of our business
execution and delivery of key technologies."
RedHawk is a full-chip Vectorless Dynamic(TM) power integrity
solution for power closure sign-off of nanometer SoC designs.
Correlated with silicon measurements and SPICE, RedHawk addresses
dynamic power issues such as simultaneous switching output (SSO) for
core, memory, clock, and I/O, as well as effects of on-chip
inductance, package RLC, and decoupling capacitance. With RedHawk,
designers can identify dynamic "hot spots," examine its impact on
timing, accurately pinpoint the cause of dynamic voltage drop, and
automatically repair the source of supply noise. RedHawk enables
designers to reach power closure sign-off for high performance SoCs,
including those utilizing ultra-low-power design techniques such
MTCMOS (power-gating), substrate back-biasing, and on-chip LDO voltage
Sentinel is the industry's first combined chip-package-board power
and I/O integrity solution. It combines chip's core switching power
delivery network, I/O sub-system, and package / PCB models in a single
environment for accurate IC-Package co-design from early prototyping
to signoff. Sentinel includes compact, Spice-compatible chip power
model (CPM) including LC resonance along with high capacity I/O-SSO
(SSO) solutions for optimal pad/package selection and electro-magnetic
interference (EMI) for EMI noise source modeling.
About Apache Design Solutions
Apache delivers the leading power sign-off solution adopted by 80%
of top IDM, fabless semiconductor, and foundries and a complete
platform solution for silicon integrity of SoC, analog IP, and system
designs. Apache's innovative platform considers all sources of noise
that impacts the design - such as power, signal, package / system IO,
substrate, and temperature. Apache's silicon integrity platform
enables designers of leading networking, wireless, communication,
consumer, and semiconductor companies to detect, fix, and prevent
design weaknesses that can result in reduced yield and failed silicon
or system. Apache's vendor-neutral solutions enable designers to adopt
any industry-standard physical design flow and are certified by TSMC's
Reference Flows (NYSE: TSM). For more information, visit
Apache Design Solutions, NSPICE, RedHawk, PsiWinder, Sahara,
Sentinel, and Vectorless Dynamic are trademarks of Apache Design