New VisualSim Mobile Modeling Toolkit reduces system-level model construction time by 10X
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New VisualSim Mobile Modeling Toolkit reduces system-level model construction time by 10X

Sunnyvale, CA. — February 19th, 2009— Mirabilis Design Inc. announced the VisualSim Mobile Modeling Toolkit for architecture exploration of wireless and multimedia System-on-Chip (SoC). Designers assemble graphical models of the hardware and software during the product definition phase using components from this Toolkit. The models enable rapid and extensive performance-power trade-offs and virtual prototypes for verification. The Toolkit facilitates architecture exploration without prior modeling experience. Early users of the Toolkit have seen reduction in modeling construction and analysis time of over 10X.

The Toolkit contains standard components, platform templates, tutorials and expert technical support. The components comprise of Processors, Buses (AXI, AHB), Memory Controller (Flash, LPDDR and Generic), Memory (SRAM, DDR, DDR2 and DDR3), Cache, DMA, bridge, switch, trace input, traffic sequence generators and flow control units. The platform templates are application-specific topologies. The platforms are assembled using the components; parameterized for common architecture exploration; and outputs standard reports. The tutorials form a graphical medium to learn, optimize and communicate coupled with a shortened learning curve for quick productivity.

All components are explored by varying parameters, extended using the C-like scripting language and validated against the respective standard. The components contain functional, timing and power details. They operate at statistical, cycle-accurate and functional abstraction levels. The abstraction is selected by the user with parameter values and transaction field content. Over two hundred reports are shipped with the Toolkit. Platform models can contain graphical instantiation of SystemC TLM 2.0, Verilog and existing C++ components. 

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About Mirabilis Design

Mirabilis Design is a leading provider of System-Level Architecture Exploration software for designing electronics and real-time software. Using VisualSim, designers can architect the “right” product, i.e. one which minimizes product failures and has not been over- or under- designed. Mirabilis Design accelerates Concept Engineering by drastically reducing typical model development from months to days and overall project time by 25-30%. Benefits from the solution are a visual executable specification; easier creation of optimized and differentiated products and; corporate infrastructure enabling extremely fast design trade-offs for price, performance and power.