Synopsys Advances State-of-the-Art in Electronic Design with Revolutionary Artificial Intelligence Technology
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Synopsys Advances State-of-the-Art in Electronic Design with Revolutionary Artificial Intelligence Technology

Introducing Synopsys™: The world's first autonomous AI application for chip design

MOUNTAIN VIEW, Calif., March 11, 2020 — (PRNewswire) —


Synopsys, Inc. (Nasdaq: SNPS) today announced a major breakthrough in electronic design technology with the introduction of (Design Space Optimization AI), the industry's first autonomous artificial intelligence application for chip design. Inspired by DeepMind's AlphaZero that mastered complex games like chess or Go, Synopsys' solution is an artificial intelligence and reasoning engine capable of searching for optimization targets in very large solution spaces of chip design. revolutionizes chip design by massively scaling exploration of options in design workflows while automating less consequential decisions, allowing SoC teams to operate at expert levels and significantly amplifying overall throughput.

"As new silicon technologies are testing the limits of physics, our customers are looking for manufacturing solutions that enable their innovative products," said Jaehong Park, executive vice president of Foundry Design Platform Development at Samsung Electronics. "In our design environment, Synopsys' systematically found optimal solutions that exceeded our previously achieved power-performance-area results. Furthermore, was able to achieve these results in as few as 3 days; a process that typically takes multiple experts over a month of experimentation. This AI-driven design methodology will enable Samsung Foundry customers to fully utilize the benefits of our cutting-edge silicon technologies for their SOC designs."

Developed from the ground up at Synopsys, is part of a multiyear, company-wide initiative and strategic investment in AI-based design technology.

Chip Design: A Vast Search Space

Today, AI can interact with humans through natural language, identify bank fraud and protect computer networks, drive cars around city streets, and play intelligent games like chess and Go. Chip design too is a very large space of potential solutions, trillions of times larger than, for example, the game of Go.

Searching this vast space is a very labor-intensive effort, typically requiring many weeks of experimentation, and often guided by past experiences and tribal knowledge. A chip design workflow typically consumes and generates terabytes of highly dimensional data compartmentalized and fragmented across many separately optimized silos. To create an optimal design recipe, engineers have to ingest volumes of high-velocity data and make complex decisions on the fly with incomplete analysis, often leading to decision fatigue and over-constraining of their design.

With today's hypercompetitive markets and stringent silicon manufacturing requirements, the difference between a good recipe and an optimal recipe can be 100s of MHz of performance, hours of battery life, and millions of dollars in design costs.

The EDA Industry's First Autonomous AI Application for Chip Design

Synopsys' solution revolutionizes the process of searching for optimal solutions by enabling autonomous optimization of broad design spaces. engines ingest large data streams generated by chip design tools and use them to explore search spaces, observing how a design evolves over time and adjusting design choices, technology parameters, and workflows to guide the exploration process towards multi-dimensional optimization objectives. uses cutting-edge machine-learning technology invented by Synopsys R&D to execute searches at massive scale, autonomously operating tens-to-thousands of exploration vectors and ingesting gigabytes of high-velocity design analysis data – all in real-time.

At the same time, automates less consequential decisions, like tuning tool settings, relieving designers of menial tasks and allowing teams to operate at a near-expert level. Knowledge is shared and applied with high effectiveness across entire design teams. This level of productivity means that engineers are now available for more projects, apply more time on a given problem to achieve better results, handle larger parts of a project, and focus on creative and value-added tasks.

A Leap in Productivity

"Ever since the introduction of Design Compiler in the late '80s, Synopsys has been enabling silicon innovators with tools and technologies across the design spectrum," said Sassine Ghazi, general manager, Design Group at Synopsys. "With, once again, Synopsys is starting a new chapter in semiconductor design. More than two years ago we set out on a fascinating journey to bring AI to chip design, partnering with academic researchers, industry thought leaders, and AI technology pioneers. Today's announcement marks a very important milestone, and our journey in AI is only just beginning."

Synopsys' solution is currently in select deployments with industry-leading partners with broader availability planned for the second half of 2020.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at

Editorial Contact:
Simone Souza
Synopsys, Inc.


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