Aldec and McGraw-Hill Partner to Include HDL Entry and Simulation in Verilog Computer-Based Training Course
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Aldec and McGraw-Hill Partner to Include HDL Entry and Simulation in Verilog Computer-Based Training Course

Henderson Nevada, September 12, 2002 -- Aldec, Inc., a pioneer in mixed language simulation and advanced design tools for FPGA and ASIC devices, today announced inclusion of its Active-HDL Student Edition in McGraw-Hill’s recent release Verilog Computer-Based Training Course. The interactive course, compiled by Dr. Zainalabedin Navabi, provides designers with a complete learning environment for Verilog design; the Active-HDL design and verification software application included in the course can be used indefinitely by the designer. The course includes a CD-ROM containing the leading tools in the industry and the course’s flexibility allows designers to learn Verilog at their own pace and according to their current level of HDL proficiency.

Verilog is becoming increasingly prevalent for FPGA and CPLD designing; its ability to abridge code makes it ideal for documentation and new designers or students learning HDL. Users new to HDL design often align themselves with the Verilog language because of its straightforward coding protocol and ease-of-use in top-down design methodologies.

Designers who purchase Verilog Computer-Based Training Course are automatically given Active-HDL’s Student Edition in the purchase price and the software application never expires. The Student Edition includes both the design entry and simulation tools needed to develop leading HDL designs.

“Aldec was pleased to include its Student Edition in Dr. Navabi’s course; the curriculum allows designers to learn Verilog according to their specific needs and if they’re more familiar with HDL languages, they can review those concepts that are of particular interest to them. Dr. Navabi has greatly benefited those wanting to learn Verilog because the most advanced tools on the market are included in the course so that designers learn the tools that they’ll be using in the commercial realm,” stated Megan Moran, Product Marketing Manger for Active-HDL.

Active-HDL’s Student Edition contains the same graphical entry and verification tools present in its commercial release of Active-HDL. Designers receive the HDL Editor, Language Assistant, the Block Diagram Editor, State Machine Editor and the Waveform Viewer to display verification results. The design entry tools help with HDL code development and the Waveform Viewer allows designers to quickly add pre-defined stimuli to the design. The Student Edition also includes VHDL and Verilog tutorials so that designers using the course can supplement their knowledge of HDLs.

Verilog Computer-Based Training Course is a valuable tool for those engineers needing instruction on this prevalent coding language. Its expansive curriculum benefits all Verilog designers and designers can use the Active-HDL Student Edition software to follow all of the sample designs in the course step-by-step on any PC. The course is readily available to all Verilog engineers and students and can be purchased directly through the internet.

Availability
Verilog Computer-Based Training Course is available for purchase through McGraw-Hill’s website at http://books.mcgraw-hill.com/ as well as amazon.com. The Active-HDL Student Edition is included in the overall purchase price. Active-HDL’s Student Edition included in the course contains an HDL Editor, Language Assistant, State Machine Editor, Block Diagram Editor and Waveform Viewer.

About Aldec
Aldec, Inc., an 18-year EDA tool provider, is committed to delivering high-performance, HDL-based design verification software for UNIX, Linux and Windows platforms. Aldec is dedicated and responsive to serving its customers’ needs. It is recognized that to be productive in today’s market and to best serve customers in the future, new technologies and innovations that go beyond traditional methods of conducting business in the EDA industry must be pursued. Aldec is committed to customer service and is actively developing a company that will evolve along with its customers’ designs. Additional information about Aldec is available at http://www.aldec.com

Author Background
Zainalabedin Navabi, Ph.D., is professor of electrical and computer engineering at Northeastern University and the author of Verilog Digital System Design and both editions of VHDL: Analysis and Modeling of Digital Systems, all published by McGraw-Hill. Since 1981, Dr. Navabi has worked in the design, definition, and implementation of hardware description languages and the synthesis and testing of digital systems. He has developed and supervised the development of many HDL-related software packages and tools, and has directed projects in VLSI design, test synthesis, simulation, synthesis, and other aspects of digital system design automation. He has served as a consultant for several EDA companies developing HDL-based tools and environments. Dr. Navabi is a member of ACM, IEEE, and IEEE Computer Society, and is an active participant in the IEEE DASC committee that sets standards related to hardware description languages.


Active-HDL is a trademark of Aldec, Inc. All other trademarks or registered trademarks are property of their respective owners

Contact:        Megan Moran        
Aldec, Inc.
(702) 990-4400 ext. 201        
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