Xilinx Improves Transceiver Simulation Time 100x With Release of Industry's First IBIS-AMI FPGA Transceiver Models
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Xilinx Improves Transceiver Simulation Time 100x With Release of Industry's First IBIS-AMI FPGA Transceiver Models

100Gbps Simulations in Minutes Instead of Hours

SAN JOSE, Calif., Nov.. 9 /PRNewswire/ -- Xilinx, Inc. (NASDAQ: XLNX) today announced the availability of the industry's first IBIS-AMI models for FPGA transceivers. Xilinx is the first FPGA provider and among the first silicon vendors to release IBIS-AMI models for its transceiver technology that will enable designers to reduce simulation time from hours to minutes. Xilinx and Signal Integrity Software, Inc. (SiSoft) will hold a free webinar on Thursday, Nov. 12 to outline the advantages of using IBIS-AMI models for transceiver simulation.

(Logo: http://www.newscom.com/cgi-bin/prnh/20020822/XLNXLOGO)

Next generation communications, networking, and consumer electronics products are replacing high-speed parallel interfaces with multi-gigabit serial links as the primary means of moving data within a system. Conventional signal integrity and timing analysis (e.g. HSPICE) won't work for these links, which require analyzing millions of bits worth of behavior to reliably determine how jitter, noise and crosstalk affect link operating margins.

The IBIS-AMI (I/O Buffer Information Specification - Algorithmic Modeling Interface) modeling specification enables standardized, interoperable simulation of SerDes PHYs at the high levels of simulation performance and accuracy needed to correctly predict the behavior of serial links. This webinar highlights how IBIS-AMI based simulation will enable you to increase design reliability while reducing engineering design time.

Using Xilinx's IBIS-AMI models and SiSoft's Quantum Channel Designer software, systems designers can experiment with different combinations of channel lengths, connectors, via designs and transmit / receive equalization to quickly determine which configurations provide adequate operating margin and which don't. Pre- and post-layout simulation with Quantum Channel Designer allows designers to validate designs and reduce time to market while increasing confidence in their design's reliability and manufacturability.

This free webinar will focus on the following topics:

    --  Xilinx IBIS-AMI simulation models for Virtex(R)-5, Virtex(R)-6 and
        Spartan(R)-6 FPGAs
    --  Predicting serial link operating margins using simulation
    --  Co-optimizing your channel design and SerDes configuration
    --  Assessing the impact of jitter, noise & crosstalk
    --  Xilinx IBIS-AMI Design Kits for SiSoft's Quantum Channel Designer

"Our experience helping customers implement the industry's first 100Gbps designs has taught us that HSPICE simulations of these wide datapaths can take hours to achieve a result," said Senior Director of the Xilinx SERDES Technology Group, David Demarinis. "As a result, we are pleased to announce the public availability of the first IBIS-AMI models in the FPGA industry to allow customers 100x faster simulation times."

Learn more:

    --  Sign up for the complimentary webinar on Thursday, November 12, 2009 at
        : http://www.sisoft.com/news_events_xilinx_webinar.asp
    --  Xilinx IBIS-AMI models can be downloaded here:

About Xilinx

Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit www.xilinx.com.


XILINX, the Xilinx Logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.

    Editorial Contact:
    Bruce Fienberg
    Xilinx, Inc.

Web site: http://www.xilinx.com/