February 16, 2004
Getting More than You Pay For - Part I
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Peggy Aycinena - Contributing Editor

by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

Kabous: “We received our initial funding last year just before DAC. But there were 10 years of research [prior to that], which led to the founding of ChipVision.”

Riewesell: “We started with 5 people a year ago. Now we have 15 people, including numerous engineers and good management. We hope to be at 25 people soon. We started marketing our product last June. We have offices here in Oldenburg, and an office in San Ramon, CA, which is the home of Stan Krolikoski, our CEO. Stan joined us from Cadence. Currently, we have distributors in Asia, Japan, and Taiwan. Through those [relationships], we have connections with the CEOs of many companies with contacts in the Asian business environment.”

“Our tool, ORINOCO, is a system-level power estimation tool. In the very early stages of the design flow, you [have the ability] to have the highest impact on power as that's when you're deciding on the fundamentals of the design. That's why we work at the specification level.”

“Already at the RTL and gate level, there are lots of hot-shot companies out there. But, there are no companies that have what we have. CoWare markets PowerEscape, but that tool focuses on memory. No one else has something in the power area.”

“We take the C code, or the SystemC code, that describes the functionality of the design, and we run this through the compiler. During the compilation, we actually instrument the software code. We add special statements, so that later on, when the software is being executed, these statements are written into a different file. This file and the one created during compilation go into ORINOCO, an annotation takes place, and the tool can then perform the estimation.”

Kabous: “It's like doing a quick synthesis, and then doing a power architecture based on that. The person doing the RTL design than has all the information available to refine the design.”

Riewessel: “When you talk to Gary Smith from Dataquest, he says that those who are able to remain in this space will have a very big future. Here in Germany, Synopsys and Cadence are both shutting down their system-level groups. They don't have anything [coming up] in the drawer for system-level design. I think they're saying, 'Let's put our business units where they can make more money.' [Apparently], they don't think that's in system design in Europe.”

Kabous: “I think what we're saying is that the big boys are pulling out of system-level development, although that may change in the future.”

Reiwessel: “We're seeing DATE as very, very important for us. Many European companies [and customers] come to DATE who don't have the budget to attend DAC. So, it's very important for us to be there.”

2 - Silicon Dimension, Inc.

Don Zereski is President and CEO at Silicon Dimensions. I spoke with him on February 10th. Michael Munsey, Vice President of Marketing, was also in on the call. It was cold where they were sitting on the East Coast. It was sunny here on the West Coast.

Zereski told me, “We're hiding here in a snow bank on the East Coast, just outside of Boston. Nonetheless, it's a very exciting time to be opening a new business. I don't think we could have hit the timing any better for the introduction of the company.”

“We've personally visited some 42 customers and virtually every customer we've seen in 8 weeks, has seen more business than they've seen in the last 2 years - some are so busy they're even asking us to do design work for them. We are doing a little bit of design consulting, but it's not really a long-term part of our business model. We'll do it to help out a customer in a pinch, but it's not really a long-term goal for us at all to be providing services.”

“[Meanwhile], we've been in a stealth mode for quite a while here, developing the product. It went through beta tests last fall, and we'll be releasing product here in 2 weeks. We now have several evaluations underway. We're moving forward with our staffing - mainly hiring sales and FAEs - and we're moving toward real revenue in this quarter.”

“We are seeing very, very positive things for overall business, although we've had difficulty at times having people appropriate the resources for tool evaluation. Once we go through a demo, however, and show them what a tool can do, they're very happy to find resources for that evaluation. In approaching a customer, we have to get to the right people, those who understand the long term benefits of our tool - the logic designers and the managers responsible for the overall project.”

“However, we also go to top management as well. For engineers and managers, it's an improved project schedule, ease of use, and the ability to provide quality netlists to the back-end folks that [they respond to]. For top management, it's ROI and risk management that makes [our offering] attractive. They see that we can cut 4 or 5 months out of the design process by minimizing iterations.”

“Our technology arose from the fact that we're all very frustrated with the existing tools. Our collective team here at Silicon Dimension has done some 300 ASICs combined. Each one of us has sat through various post-mortems on projects and we've seen the same issues come up each time. There's too little floorplanning and analysis being done on the front end. And it's taking too long to get quality [information] to the back-end folks. In other words, there's been little communication between the front-end and back-end folks.”

“Also, the back-end turn around time [was a problem] - the back-end gets the netlist and turns it around back to the logic designers. This process has [traditionally] often been more than just a matter of hours or days, it's often been a matter of weeks. It's created a tremendous problem in terms of the overall schedule. Our team sat down one day and looked at about 150 different elements like these, things that we had observed in our experience, and felt that if we could resolve them, we could provide both the logic designer and the physical designer the ability to avoid false starts.”

“We started with no pre-conceived notions, but with a clear problem set and a clear set of solutions. The Chip2Night platform is a suite of technology modules that directly address problems that the logic designer [must face], and gives him some understanding of the back-end and the issues that the physical designer [must face]. It allows the logic designer to provide the quality netlist that the physical designer needs. Those 3 or 4 months of back-and-forth iterations are now solved.”

“The logic designers care [about these things] because they want their companies to make money. They're responsible for resolving the issues that allow the back-end to produce something that's useful and economically viable. So far, every logic designer we've talked to has been tickled pink. And, from everything we can see, we don't see anybody who's particularly competitive with us. Our tools are designed so that a logic designer can use them effectively after just 2 days of training.”

“[As far as the business climate is concerned], North America is moving forward, but so is Europe. Europe is spending an awful lot of money right now, especially in the area of defense. There's a tremendous amount of spending from the EU into defense, just like here, and there is a tremendous amount of new ASIC starts [associated with that demand].”

“I think the ASIC starts have been dropping over the last couple of years because of risk factors and [the fact that] not a lot of new R&D projects kicked off because of the economic conditions. But now it's changing because of increased spending for homeland defense, electronics, the military area, and consumer electronics. We're seeing very, very positive things for our overall business.”

In the category of ...

Letters to the Editor

Letter No. 1

Please add a table of contents, or headlines, to the top of your articles, so that I can quickly find the specific articles I am interested in. I like your thoroughness and wide range of coverage, but I would rather not have to scan through the articles I am not interested in.

« Previous Page 1 | 2 | 3 | 4 | 5 | 6  Next Page »

You can find the full EDACafe event calendar here.

To read more news, click here.

-- Peggy Aycinena, EDACafe.com Contributing Editor.

Review Article Be the first to review this article

 Advanced Asembly

Featured Video
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
You’re Invited! SEMI’s Innovation for a Transforming World
intelThe Dominion of Design
by intel
The Long Game: Product and Security Assurance
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Setting a High Standard for Standards-Based IP
Sr Engineer - RF/mmWave IC Design for Global Foundaries at Santa Clara, California
Pre-silicon Design Verification Engineer for Intel at Santa Clara, California
Principle Engineer (Analog-Mixed-Signal Implementation) for Global Foundaries at Santa Clara, California
Staff SerDes Applications Design Engineer for Xilinx at San Jose, California
Circuit Design & Layout Simulation Engineer - Co-Op (Spring 2021) for Global Foundaries at Santa Clara, California
Senior HID Sensor Algorithm Architect for Apple Inc at Cupertino, California
Upcoming Events
Join Chipx2021 - at Tel Aviv Expo convention center Tel Aviv Israel - Jun 21 - 22, 2021
Innovation for a Transforming World -virtual Event at United States - Jul 13 - 14, 2021
DesignCon 2021 at San Jose McEnery Convention Center San Jose, CA San Jose CA - Aug 16 - 18, 2021
SEMICON Southeast Asia 2021 Hybrid Event at Setia SPICE Convention Centre Penang Malaysia - Aug 23 - 27, 2021
Verific: SystemVerilog & VHDL Parsers

© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise