October 06, 2003
Toshiba's Richard Tobias
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Peggy Aycinena - Contributing Editor


by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!


How about the royalty model? Tobias says that's not a valid concept with regards to EDA tools: “The royalty idea, taking a cut of the production revenue, is broken. The EDA vendor is not part of the chain of selling the silicon - they're not providing intrinsic value there. The reason that the royalty model works for star IP is because for a company like ARM, for instance, the company's IP is a selling feature for a product. But whether a chip has been developed using Cadence, or Magma, or Synopsys doesn't change the intrinsic value of the chip. The EDA tools have no way of affecting the sale of that chip - the vendors shouldn't be asked to have their revenue depend on whether the chips sells or not. That would mean that they would have to [completely] understand the end market, [which they don't].”

Tobias says the situation is simple to understand: “Basically, an EDA vendor gets paid when certain events happen in the product's life cycle. If the vendors moved to a time-to-production-based payment model, they would have a motivating factor in a reduced turn-around time for the design. Designs come with some easily measured metrics of complexity - the number of gates, the frequency, the current technology, whatever. If I, the customer, can get the chip out faster, you, the EDA vendor, would make more money. And, in my model, the customer would pay for the tools, not for the FAEs needed to support the tools.”

Tobias says there would be an additional benefit from this model: “For most companies like Toshiba, EDA money comes out of a centralized budget usually paid by semi-corporate-wide money. The tools become a shared resource and every group [pitches in to] pay the costs. But if the customer had smaller CAD tool fees, there would be better accounting across business units. The costs of the CAD tools would be more fairly broken up. The business units would have more choices as well - they could pick what they really wanted to use. They could switch their flows around as they saw fit. It would allow me to give my various business units more choices, and [give all of us a] better way to judge the success of each unit.”

He adds that this change would more closely reflect the situation as it stands today: “The reality is that all of the business units already have relationships with their CAD vendors, they already have support from the FAEs. Why not have them buy their tools based on those relationships?”

Tobias is on a mission and it sounds as if he intends to succeed: “I think that if companies like Toshiba push the EDA vendors, [they will respond]. Of course, there has to be a give and take between the customers and the vendors. If the vendors think something is truly bad for them, they won't do it. But their current business model is truly bad for the industry - something that can be easily shown.”

“We have 3, 4, and 5-year contracts with our EDA vendors, and it appears that their tools fall apart by the end of the time. Vendors should realize that if tools are no good by the end of an agreement, customers will definitely jump ship. Currently, the CAD companies aren't really motivated to be sure that their technology is best of class. And, with the current business model, they're enjoying a 3-year hiatus of not having to do anything about it. The CAD companies today are driven more by financial stuff than by creating correct technology for their customers. The truth is, for several companies that I'm aware of, if they keep going this way they're going to be in very sorry shape in just a little while.”

“Of course, we haven't stopped internal tools development here at Toshiba. Our effort here in that area is incredibly huge, especially for certain classes of design where we have no choice but to use our internal tools. I'm telling you, though, that we don't do this by choice. We do it to provide a constant threat to the EDA vendors, to push them to improve their tools, and to correct their business models to be in line with our needs as the customer.”

“The wealth of our industry, across all of electronics, is dependent on creating new products in a timely fashion and as fast as possible, because we don't know which one will be the next killer app. What that means for us at Toshiba is that we have to be putting thousands of different products through our fabs each month, with the implication of having lots of products on the market at any one time. The EDA vendors need to be in line with that concept, have to be in line with producing as many products as possible, and providing the tools for that effort. The problem is today that the business models of the EDA vendors simply don't address that end goal. Something has to give here.”



Industry News -- Tools and IP

Cadence Design Systems, Inc. has introduced Encounter Test Solutions, which the company describes as “the most comprehensive test solution available on the market to support a unified test methodology bridging design and manufacturing.” The new offering is aimed at the unique needs of product and process engineers who have experienced “large inefficiencies in time and effort when endeavoring to improve yield … by accelerating defect identification and linking design and manufacturing data.” Meanwhile, the company says the Encounter Test Solutions expands on IBM's in-house EDA “test tools and heritage,” acquired in September 2002.

Encounter Test Solutions is comprised of two products - Encounter Test Design Edition and Encounter Test Manufacturing Edition. Encounter Test Design Edition, which is intended for design and test engineers, includes automated DFT insertion, capacity for designs with more than 50 million gates, memory BIST, embedded core test, test compression with x-state masking, and high-coverage delay tests. Encounter Test Manufacturing Edition is a failure diagnostic environment that analyzes design intent and manufacturing information.

Also from Cadence - The company announced what it describes as “the industry's first integrated IC packaging design and signal integrity analysis solution: the Cadence Advanced Packaging Engineer 3D (APE-3D), a tight coupling of the industry-leading Cadence Advanced Package Engineer (APE) with Optimal Corp.'s 3D field solver engine.” APE-3D is “an electrical and physical design system that enables IC buffer designers and PCB system designers to explore, design, implement and verify interconnect topologies and electrical constraints through simulation. It also enables these users to create full or partial IC package simulation models to optimize system-wide interconnect performance.”
Jamie Metcalf, Vice President of Marketing for Cadence's PCB Systems Division, made these comments in a phone call discussing the new product: “The APE-3D release is a pretty significant announcement. Traditionally, people have used our APE (Advanced Packaging Engineer), and have used layout tools in combination with various third-party extraction and analysis tools. But as with all point tools, customers had to deal with integration issues and synchronization issues. Customers also had to deal with two or more companies to get support issues dealt with.”

“So what we've done here is to [acknowledge] that designers really need a 3D modeling capacity to adequately design packages. We did some benchmarking and research, and spoke with several customers, and found that the Optimal technology was very well respected in U.S., Europe, Japan, and Asia Pacific. Their tools have a very good reputation for accuracy and speed, so we got into a discussion with Optimal about working together. We're basically embedding their engine into our product. Up to now, we've been depending on point tools for 3D extraction, but now with this OEM relationship with Optimal, when you buy APE-3D, you get the engine with it. APE-3D is now a product for the electrical and physical design of an IC package that allows 3D characterization of solder bumps, wire bond, solder balls, and 3D modeling of complex grounds and power planes.”

Switching to other topics, Jamie Metcalf also told me during the same phone call, “The latest OrCAD release is interesting because, to be honest, there's been some tittle-tattle in the market place as to Cadence's level of commitment to the OrCAD business. I believe this OrCAD release has new functionality and demonstrates that we're still investing in the OrCAD line, and that Cadence is still promoting it. We have made some changes to our sales model for OrCAD where we've signed up with EMA to handle the sales distribution, and I'm happy to report that it's going great - those guys are 100% committed to promoting OrCAD. It's quite tough for a company like Cadence to mix business models - the high-end market of ICs versus the high-volume market for OrCAD. But we're very pleased with what EMA has done and this release is a culmination of that [effort]. It demonstrates that we're still investing there and doing good stuff. We're still devoted to the product and don't want to listen to the naysayers out there. And we don't think our customers should either.”

« Previous Page 1 | 2 | 3 | 4 | 5 | 6  Next Page »


You can find the full EDACafe.com event calendar here.

To read more news, click here.


-- Peggy Aycinena, EDACafe.com Contributing Editor.

Featured Video
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Ansys’ John Lee on Cultivating Trust within his Team
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
The Role of the Portable Stimulus Standard in VLSI Development
Jobs
Technical Staff Engineer - Hardware (FPGA) for Microchip at San Jose, California
Senior SOC Design Engineer for Nvidia at Santa Clara, California
Senior Staff Engineer for Samsung Electronics at San Jose, California
Electrical Engineer - ASIC/FPGA for General Dynamics Mission Systems at Florham Park, New Jersey
Physical Design Engineer (Multiple Openings) for Samsung Electronics at Austin, Texas
Hardware Development Engineer - (PCB) for Cisco Systems Inc at Austin, Texas
Upcoming Events
SEMICON Southeast Asia 2024 at MITEC Kuala Lumpur Malaysia - May 28 - 30, 2024
3D & Systems Summit - Heterogeneous Systems for the Intelligently Connected Era at Hilton Dresden Hotel An der Frauenkirche 5, 01067 Dresden Germany - Jun 12 - 14, 2024
2024 IEEE Symposium on VLSI Technology & Circuits at HILTON HAWAIIAN VILLAGE HONOLULU HI - Jun 16 - 20, 2024
Design Automation Conference (DAC) 2024 at Moscone West, San Francisco CA - Jun 23 - 27, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise