May 19, 2003
Linux Lunges into the Limelight
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Peggy Aycinena - Contributing Editor

by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

“Meanwhile, we're seeing a whole new way of doing business here in Silicon Valley. First of all, there are ten times as many meetings before a decision is made, and it's no longer easy to justify expending so much energy with so little return - which causes a trickle-down effect and more contraction in the industry.”

“But I'm optimistic that we'll return to full employment in Silicon Valley soon, and with roughly the same mix of employee types that we've seen in the past. In this market, only the best employees survive - if you want to hire good people, they're still not easy to find. Meanwhile, housing prices here continue to be almost at dot-com-era levels.”

“As we all push forward the benefits of globalization - opening economies and increasing the level of education - global markets are beginning to compete with us on talent. I expect, going forward, certain things will be done better in China or in other emerging markets. But we're not going to be weakened here in Silicon Valley just because some of the infrastructure has moved to India or China.”

“In fact, only the large players can afford to invest in India and China these days - the barriers of entry have become too high - so we've recently set up a subsidiary in Armenia. Countries like Armenia, and other former members of the Soviet block, have engineers who are well-educated and very skilled at writing computer code. They have the theoretical knowledge to contribute to our R&D, and there are excellent universities there as well.”

“Silicon Valley continues to be the center of the [technical] world and we'll bounce back. We have a unique blend here of everything one needs to be successful, a confluence of many things - technical capability, available capital, marketing savvy, and the requisite infrastructure, including legal counsel, accounting expertise, and an on-demand IT network.”

“I don't think history will repeat itself. I don't think there will be another boom cycle in Silicon Valley like we saw in the 1990's - a time when we certainly saw excesses. But we'll definitely see another upturn here. It may have some of the same characteristics of the last upturn, but the fact that we're more concerned today about cost rather than time to market - that will be with us for a long time.”

Issues at DAC - Structured ASIC versus Platform

Max Lloyd is CEO of ViASIC Inc., a young EDA company out of Research Triangle Park, NC, emphasizing physical design technology. Bill Cox is CTO for the company.

In a recent phone call, Lloyd and Cox sorted out definitions and explained the technology behind the term “structured ASIC.” It's probably good to master these definitions now before DAC. After all, LSI Logic is also talking about “structured ASICs” in their RapidChip product, so here's an opportunity to sort out what the thing really is.

Max Lloyd said, “The term, 'structured ASIC,' seems to be gaining the most acceptance. We switched over to using the term because every other phrase ended up getting someone upset. For instance, we were using the term, 'modular array,' and 'ASIC array' but that caused problems with the association with gate arrays. Now we've switched over and are using 'structured ASIC.' The term doesn't actually say a whole lot - it just refers to an ASIC with pre-defined layers and user-configurable layers, which means that you can go through and pre-manufacture certain layers of the chip.”

“Our ViASIC product is intended for the structured ASIC market, where there is only one user-configurable layer. The lower layers are fixed and the upper layers are fixed, so you only have one layer that needs a custom reticle. For instance, perhaps you have segmented wires on levels 4, 5, and 6. All of these wires have potential electrical paths down to layers 1,2, and 3. By having or not having certain vias between layers 3 and 4, the one-mask via layer, you can create your custom electronics. If you put a via there, you complete the electrical path. If the via's not there, it's an open circuit. The concept is like that of an FPGA, but you're using vias instead of a large programmable electrical switch. Using a structured ASIC is a good way to implement a platform.”

Which begs the question - when is it a platform and when is it a structured ASIC?

Bill Cox said, “You can implement a platform in a structured ASIC. For instance, in LSI's RapidChip, each base is a platform. In fact, you might call what our customers make, a 'platform.' Typically they will have a high-value piece of silicon that they want to incorporate into several products. They'll customize each product with our technology. We call those types of customers, 'flexible standard product' guys. They might have a new networking widget, for example, and they're doing custom silicon at 0.18 or 0.13 microns. Now they want to sell it with 6 different applications. We'll do the logic that they need to differentiate those 6 different applications. Typically, we'll be used for just a small piece of their die, where the rest of the die might be some difficult SoC type of thing. We allow customers to develop a product family of SoCs.”

Lloyd said, “Actually, platforms are defined differently by everybody. A 'platform' means that you're re-using a piece of the silicon - the part that's common across different product families. For instance, a flexible standard product is one of our concepts of what a platform could look like. If you wanted to make a basic platform for different customers - if you were selling chips to both Sony and Philips, for instance - you could customize the platform using our technology for each customer. Platforms are a great way to introduce new technology, but without the expense.”

Lloyd said, “Basically, you have four methods for producing products on silicon.”

“One is to trade initial engineering costs with high per-part prices - FPGAs “

“One is to use old-fashioned gate arrays - but with the number of metal layers common today, about half the masks still need to be customized.”

“One is to use a standard-cell ASIC at 130 nanometers and below - but that's killing people these days with the mask costs.”

“One is to use a structured ASIC - which is a new methodology. Big players are coming out with structured ASICs, but none of these companies can implement the products with fewer than 4 masks. We're offering tools to do it in one mask.”

Cox added, “Meanwhile, for structured ASICs, the only software available has been at the fab or at the manufacturing location. For example, one vendor has to have specialists who run the tool flow for a particular chip. The customers can't touch the tool. The vendor plans to fix that, but meanwhile we've allowed the physical implementation of structured ASICs back to the designer, the one who best understands how the chip should function.”

“Typically today, in a standard cell ASIC flow, the guys who know a particular market - say cell phones or consumer electronics - will throw the specifications over the wall and let the ASIC vendors design the chip. Most products at Circuit City are done with standard-cell ASICs, at costs of 50 cents per part. But it takes $750,000 to get the mask off the line.”

“By using structured ASICs, the parts costs may be up to 75 cents per package, but you have reduced mask costs - $40,000 to $50,000 - and improved performance. By using structured ASIC, we'll have a whole new market.”

The hard working folks in PR

The following was brazenly plagiarized from a Mother's Day greeting making the rounds in e-mail last week:

WANTED: People to work in PR

JOB DESCRIPTION: Team players needed for challenging work in an often chaotic environment. Candidates must possess excellent communication and organizational skills and be willing to work variable hours, including evenings, weekends, and frequent 24-hour shifts on call. Some travel required, including trips to conferences and trade shows as needed.

RESPONSIBILITIES: Must be impeccably polite to everyone at all times including clients, editors, and investors. Must be willing to bite tongue repeatedly. Must be willing to be hated, at least temporarily - especially when gently reprimanding a client for speaking out of school. Must possess the physical stamina of a pack mule and be able to go from zero to 60 mph in three seconds flat. Must be willing to face stimulating technical challenges, such as arranging conference calls, zipping/delivering PowerPoint presentations, telling time across multiple time zones, or understanding what in heck is being discussed around the table between technologists. Must screen phone calls, maintain calendars, and coordinate production of multiple projects simultaneously. Must have ability to plan and organize social gatherings for clients of all ages and mental outlooks. Must assume final, complete accountability for the quality of the end product. Must be willing to be indispensable one minute, unnecessary the next. Your job is to remain steadfast, without complaining. Your compensation will be directly proportional to the state of the economy. Sometimes there will be no compensation at all. Must always hope for the best, but be prepared for the worst. Must appear to love work at all times.

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-- Peggy Aycinena, Contributing Editor.

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