November 04, 2002
Cadence and Mentor Put on the Legal Boxing Gloves Once Again Over Emulation Technology PatentsCadence Files Suit Against Mentor and Aptix for Fraud,
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Ann Steffora - Contributing Editor

by Ann Steffora - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

Cadence Design Systems, Inc. announced that S3 / Via Technologies purchased the Palladium design verification system. S3 said it selected Palladium following an extensive evaluation of available simulation-acceleration and in-circuit emulation technologies. S3 said it is using Palladium for hardware/software co-verification of its next generation 3D graphics design, a multi-million-gate chip being implemented in 130-nanometer technology.
Xpedion Design Systems announced that Microtune, Inc., a supplier of RF-based silicon and systems solutions for the global broadband communications, automotive electronics, and wireless connectivity markets, is using Xpedion's GoldenGate RF circuit simulation tools for verification of its RF IC designs. Microtune said GoldenGate allows its designers to utilize Harmonic Balance techniques to analyze and optimize high frequency amplifiers, mixers and oscillators.
GoldenGate tools provide the capability to simulate designs developed in the Cadence Analog Design Environment (ADE) without migration to or from any other format and was given high marks in Microtune's engineering evaluation due to the product's accuracy, ability to converge upon large transistor count devices, speed and unique analysis capabilities, the companies said.
Synplicity, Inc. announced that Toshiba Design & Manufacturing Service Corporation (Toshiba DMS) has standardized on Synplicity's Synplify, Synplify Pro, and the Amplify Physical Optimizer tools. Toshiba DMS, a leading designer and manufacturer of printed circuit boards and designer of semiconductors for communications, control, medical and electronic applications said it chose Synplicity's FPGA synthesis solution to help achieve high quality of results in timing-critical FPGA designs. Toshiba DMS said it would use Synplicity's solutions to design FPGAs for industrial equipment including communications equipment, control systems, medical instruments and electronics equipment.
Toshiba Corporation established Toshiba DMS in November 2001 to reduce printed circuit board design and production costs, which combines the manufacturing and design capabilities of the various Toshiba engineering facilities including the Hino factory, Fuchu business office, Nasu factory, Yanagimachi business office and Komukai factory. Toshiba DMS designs and manufacturers printed circuit boards and designs large scale integration semiconductors and FPGAs.
Corporate News & Partnerships
Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC) and Synopsys, Inc. have qualified Synopsys' signal integrity (SI) suite to address the design methodology for 130 nanometer (nm) and 90 nm process technologies. This extension of design methodology is the result of an ongoing collaboration to utilize the latest silicon processes. This is the first IC industry collaboration delivering a comprehensive SI suite for 130 nm and 90 nm processes, the companies said.
TSMC and Synopsys have addressed SI issues by deploying a proven methodology using Synopsys' IC implementation and analysis tools coupled with TSMC's manufacturing expertise. The upcoming TSMC Reference Flow 4.0 will reportedly incorporate a number of Synopsys' tools, including Astro, Astro-Rail, Astro-Xtalk, Design Compiler, Floorplan Compiler, Physical Compiler, PrimeTime, PrimeTime SI, and Star-RCXT.
Mentor Graphics extended its remarketing agreement with NewLogic, a leading supplier of semiconductor IP cores for wireless systems, to include the WiLD 802.11 Wireless LAN platform. With this agreement, SoC designers can license a complete platform for wireless LAN IC development from Mentor Graphics. The 802.11 wireless platform complements Universal Serial Bus (USB), Bluetooth and other standards-based IP offerings in the Mentor Graphics Inventra family, enabling the company to further address growth in the consumer electronic, computing and home networking markets.
The WiLD platform includes the multi standard WiLD 802.11a/b/g MAC core and the WiLD 802.11b Modem (physical layer). It will be complemented soon by the WiLD 802.11a and g Modems, the WiLD 802.11a/b/g dual band CMOS Radio and the 802.11e/i/h software upgrade options once the respective standards are ratified, the companies said. In addition, integration support, a prototyping platform (WiLD Card I) and full integration services to help designers meet aggressive time-to-market plans.
Mentor Graphics also announced a joint development and marketing program called ADAPT (Authorized DataFusion Partner), designed to enable Web-based information providers, such as online component database services, to integrate quickly and easily with DMS, Mentor's design data management infrastructure solution. DMS connects the design engineer's desktop to the extended enterprise, making component criteria available during the critical product development phase, in which as much as 80 percent of a product's lifecycle cost is determined.
Mentor Graphics said it would work with ADAPT program partners to develop standards-based interfaces between DMS and the partner's offerings. As a result, Mentor Graphics will be able to offer add-on modules to DMS that will allow users with any necessary subscriptions for the partner's product or service portfolio to incorporate the Web-based information into their company's library.
Mentor also announced that the Global Information Business unit of Arrow Electronics, Inc. is the newest member of the program and the two companies are working together to develop an interface between Mentor's DMS solution and the Global Information Business' leading electronic components database, Ubiquidata. The ADAPT program expands on and formalizes the DMS-Xchange content provider program that Mentor Graphics initially established with PartMiner, Inc.
DMS consolidates and manages the work-in-process design infrastructure, integrates the engineer into the extended enterprise and ensures improved information flow on the designer's desktop. DMS-Xchange is the communication and interchange platform that allows DMS users to access many different content providers and solution partner offerings using standards, such as eXtensible Markup Language (XML) based formats. The modular architecture of DMS-Xchange allows partners to integrate with DMS and gives users the flexibility to choose modules based on their organization's requirements.
ADAPT content and solution providers will be able to deliver a specialized interface to DMS and gain a competitive advantage by making their offerings more valuable to the community of system design and PCB designers using DMS. Companies who are accepted into the ADAPT program sign a joint development and marketing agreement and receive product and technology training. For more information contact
Synchronicity Inc. and The Virtual Component Exchange (VCX) announced a joint marketing agreement to better connect semiconductor IP vendors to their customers and end users. The agreement extends the companies' existing relationship and leverages Synchronicity's position in design collaboration and IP management with VCX's position as host of the Internet-based regulated trading exchange for semiconductor IP, and supplier of IP exchange software.
Under the agreement, Synchronicity and VCX will market their respective solutions to members of the electronics design chain, which includes library and IP vendors, SOC developers and foundries. The companies will also integrate their applications.
Grand Central Communications announced that Xilinx has chosen its Web Services Network to improve the exchange of critical product test data with IBM Microelectronics. By subscribing to Grand Central's Web Services Network, Xilinx is able to securely integrate with IBM Microelectronics to roll out the company's products. By meeting-in-the middle and connecting to Grand Central's Web Services Network, Xilinx and IBM Microelectronics are able to leverage their existing IT infrastructures, security and file formats without making changes or adding software.
IBM Microelectronics and Xilinx have created a collaborative design and development model that enables the companies' innovations to be taken to market rapidly. Grand Central's network provides a connectivity solution that increases the speed, reliability, and proactive notification of transmission of Xilinx's critical test data from IBM Microelectronics. This improved integration relationship significantly reduces costly chip production issues for Xilinx, resulting in a higher quality product and greater overall productivity, the companies explained.
IBM Microelectronics offers a comprehensive suite of testing services and solutions for chip manufacturers including Xilinx. IBM Microelectronics previously delivering test data to its customers through an FTP link, but now uses this more reliable and secure HTTPS transport protocol.
The 40th Design Automation Conference (DAC) has issued a call for papers for regular technical papers, special topic sessions, panels, tutorials and university design contest entries. The annual conference, which promotes advances in design automation software and hardware for electronic systems, will be held June 2 to 6, 2003 at the Anaheim Convention Center in Anaheim, Calif. Authors are invited to submit original technical papers describing recent and novel research or engineering developments in all areas of design automation for the Design Methods or Design Tools Tracks, or for Embedded Systems Topics. The paper submissions deadline is Friday, December 6. The submission site is scheduled to open Monday, October 21. Panel and special session proposals will be accepted through Monday, November 4, 2002. The panel and special session submission site is now open.
The Student Design Contest is an invitation to students to submit descriptions of original electronic designs, either circuit level or system level. Two categories of designs are eligible for awards -- operational and conceptual. For operational designs, proof-of-implementation is required. A complete simulation is necessary for conceptual designs. Designs must be part of the student's university studies and must have been completed after June 2001. Selected designs will be presented at the conference. Student Design Contest submissions must be submitted by Friday, December 20, 2002 .

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-- Ann Steffora, Contributing Editor.

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