December 17, 2007
Apache Design Plus Optimal Equals?
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Jack Horgan - Contributing Editor

by Jack Horgan - Contributing Editor
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At the end of October Apache Design Solutions announced that it has signed a definitive agreement to acquire Optimal Corporation, a provider of 3D power, signal, and thermal analysis for package, System-in-Package (SiP), and board designs for an undisclosed amount of cash. Optimal’s product line includes package and PCB extraction and analysis solution for power, signal, and thermal integrity compliments Apache’s newly introduced Sentinel product line targeted at system power and I/O signal integrity.
I had an opportunity to discuss this with Apache CEO Andrew Yang.

You’re in the Los Angeles area.

Yes, north and west of Los Angeles.
805 area code. That used to be place where I went to high school. I went to Ventura High School.

I’m in Thousand Oaks.
That’s 15 miles east of Ventura.

Right! Perhaps we could begin with a brief biography after high school.
I went to college at Berkley and then worked as a designer at AMD for two years. After that I went to graduate school at the University of Illinois at Urbana-Champaign. I got my Ph. D. there and then went to teach at the University of Washington at Seattle for about seven years. Along the way I founded a company called Anagram which provided high capacity simulation, Fast Spice, to compete with Epic. The company was acquired by Avante in 1996. I stayed on for about two years and managed the analysis product division as VP of all products related to extraction, simulation (HSPICE, StarRC, SPICE, FastSpice), library characterization and so forth. Then I became a private investor involved in several leading investments in EDA such as CADMOS which was acquired by Cadence. I also invested in Ultima which merged with VCH to form Celestry which was acquired by Cadence and in Innologic which was acquired by Synopsys. Then I invested in Mojave that was acquired by Magma. I founded Apache in 2001 with two other founders focusing on power. I have been CEO and Chairman for six and one half years.

What caused you to leave the world of investment community where you had considerable success and get back into running the day-to-day operations of a startup company?
I got bored. I was less than forty years old. The challenge is to take the company to a bigger scale. I did see the vision that power was emerging to be a very important area. This was back in 2001. As we talk today power is indeed the leading market criticality for the semiconductor industry. That vision was also part of the reason I wanted to be hands on with the company form the beginning. Today we have over 140 employees and operations in nine or ten different countries with R&D centers in five locations. So it really became interesting and exciting career move for me. At this point the next step is whether I can challenge my career in moving to an even bigger scale, providing not just a point tool but a platform solution for the semiconductor industry.

Did you have and the vision and then went out to recruit a team to form Apache or did you find some people with a vision and/or some technology and decide to bankroll them?
There were three of us. The other two were form HP. We brainstormed which areas would have a critical impact on the industry. We isolated the vision to this power area. There was no solution at that point addressing the so called full chip dynamic power or leakage power. We had to build not just the founding team but also the first tier engineering team with expertise encompassing a wide range of domains including extraction, power calculation, signal integrity and so on. That took about a year and a half to two years to build the team. Then the first prototype product was released in 2003. It became the first industry product to address full chip dynamic power solution. That was exciting because we are building something from scratch, creating a new market not just a me-too trying to do something better than existing solutions. To me that is the most gratifying experience. My career is always to work on something new. I have two or three years ahead of what other people think is important and what they think is possible. Get the market validation and get the business to scale up to confirm the vision. That indeed is what happened here at Apache. This always follows our vision and scales linearly with uninterrupted growth.

Did you bankroll Apache or did you get others to invest?
That’s a good question. Apache follows my previous strategy of so called capital efficiency. If you look at my past record, I have always believed that in the EDA space capital efficiency is critical. That is how we drive the team together and work under a focused effort and target with pin point accuracy a specific area. The company Apache was funded with a very small amount of capital. I am the lead investor. We have had two rounds, a Series A and a Series B. The other investors include Intel Capital and Andy Bechtolsheim who was one of the early investors along with me in another company (CadMOS) we help found. These are the main investors.

What was the approach to addressing dynamic power and leakage power?
At that point back in 2001 the only solution in the market was based on static solution which is a DC based solution. This was mainly because of the complexity of dull chip and also the accuracy required is so high for dynamic. The existing methodology at that time was to simplify the problem by looking only at the DC aspect of dynamic power. Clearly because of the simplification and approximation a huge amount of inadequacy was introduced, mainly the modeling of inductance and capacitance and off-chip package parasitics was missing in the static analysis. The underlying technology behind our first core product called Red Hat was based upon an innovative approach, a three step approach. The first step is to pre-characterize standard cells, IOs, IP and analog memory. And to bring transistor level modeling accuracy into the flow at the abstract level. Then in the second stage we extract the power delivery network in terms of resistance, capacitance and inductance. Then bringing the modeling accuracy of the cells, memory, and IOs to create a network that we can solve in the time domain with transient analysis engine. This transient analysis engine is clearly different from the static solution in the market. At the time because the static solution only solves the network in a single shot, at one DC operating point. The transient analysis solves the entire time domain waveform creating more accuracy and more data for the customer to analyze the true behavior of the dynamic power. The first step is to taking the analog waveform and then analyze its impact on timing such as full chip timing and frequency operation as well as critical areas such as jitter. This three step approach we believe is innovative allowing us to retain accuracy at the transistor level but also expand the capacity to handle full chip with a chip as large as a graphic chip or a CPU chip. And also the ability to look at timing and feed it back into the designers flow. That was the first full product innovation in this area. The leakage solution came along because as processes migrated to 65 nm and 45 nm, leakage power starts to play a critical role. That is because leakage power becomes a bigger contributor to total power. To manage the leakage there are many interesting design techniques including power switches, NTMOS techniques. Basically it is just shutting down and turning on the power supply. By definition, if you are shutting down or ramping up or turning off, it is a dynamic problem. Our dynamic engine naturally becomes the enabling solution to handle such an important problem. Today for 65 nm and going to 45 nm we believe more and more designs will employ these kinds of dynamic solutions, i.e. turn-on, turn-off type of design techniques.

What does the Apache product portfolio consist of?
We entered the market with this full chip dynamic power integrity solution called RedHawk. We extended that to low power, low leakage management solution called RedHawk-LP. Then we also have the follow-on fix and optimize solution to resolve any noise induced timing issues called FAO for fix and optimize. That is our SoC solution portfolio. Then there are one or two product areas that we introduce to the market every year. This includes Sahara which we introduced two years ago. This is an on-chip thermal solution with the vision that on-chip temperature variation will start to play an important role in impacting the performance and the power characteristics of the design. This year is also an important year for Apache. We announced our new focus in the area of packaging with a new product called Sentinel with a vision that power and noise requirements will no longer be contained in just the IC but will be a system wide challenge. Our vision is to expand our on-chip solution into the package and board with this new product family. That leads us to the recent activity of acquiring Optimal which specializes in packaging and board extraction and analysis.

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-- Jack Horgan, Contributing Editor.


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