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 Veloce delivers capacity for AI/ML chip verification beyond 10B gates
Mentor Graphics
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Keywords: Artificial intelligence, machine learning, hardware emulation, HW/SW verification, WAVE computing
Description: Interview with Jean-Marie Brunet, Sr. Director of Mentor, a Siemens Business at Dvcon 2019

View Radek Nawrot, Director of Operations Views: 2273 View Michiel Ligthart, COO Views: 560 View Veloce delivers capacity for AI/ML chip verification beyond 10B gates Views: 679

View Hagai Arbel, CEO Views: 268 View Simon Butler, CEO Views: 349 View Tom Anderson, Technical Marketing Consultant Views: 349

Total : 6

Aldec

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