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-> 2019 DVCon
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Veloce delivers capacity for AI/ML chip verification beyond 10B gates
Mentor Graphics
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Keywords: Artificial intelligence, machine learning, hardware emulation, HW/SW verification, WAVE computing
Description: Interview with Jean-Marie Brunet, Sr. Director of Mentor, a Siemens Business at Dvcon 2019
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Veloce delivers capacity for AI/ML chip verification beyond 10B gates
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