(Unregistered) 04/13/06 11:35 PM
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Can the chip design - verification divide be plugged in with some knee jerk band aid type strategies?
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Can the chip design - verification divide be plugged in with some knee jerk band aid type strategies? Use this link to read the full article
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maneesh (Unregistered) 04/13/06 11:35 PM
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exellent article
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senthil (Unregistered) 04/17/06 04:44 AM
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good article
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senthil (Unregistered) 04/17/06 04:47 AM
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it good for people involved in chip veriication like me.
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Ravikanth (Unregistered) 04/18/06 11:27 PM
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good article on chip verification
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Sandilya Bhagi (Unregistered) 04/18/06 11:36 PM
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Re: Can the chip design - verification divide be plugged in with some knee jerk band aid type strategies?
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It was really good article which helps in understanding the process and the line "The highest quality working silicon should be 100% functional and should hit the shelves on time." is really true, and in the last the FPGA should be given more importance, all these combination will really get a good silicon in time.
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Sandeep Kuamr (Unregistered) 04/20/06 11:21 PM
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With the race of Less "Time To Market" of a Product. We should not forget that how well our System On Chip (SOC) will do out in the Field.
Everything starts from Motive and our Motive is to achive the both of two. First is Less Time To Market and Second is Performance of SOC in the field
So to become an Industry Leader in SOC this article will provide the way to achive the height.
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sachish (Unregistered) 04/25/06 10:26 PM
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traditional verification importance
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Ya definitely the most important step in developing the SOC is the verification part and the most important reason behind this is the developement of new technology. everyday new tech is coming and industry are changing their pattern by keeping all those things like Power consumption speed and area minituarisation factors in their mind.
In this paper u concentrated on the verification and whatever the steps anyone should follow in verification you have mentioned from the beginning is really appreciable, and what i think each and every kind of verification (like assertion, formal, functional, net list and teh postlayout verification) step should be follow to develope a chip and before launching this in market. definitely its little bit time consuming but if you are giving a new technology it should be perform cent percent in the market.
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Ranveer Kumar (Unregistered) 05/12/06 03:32 AM
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Good verification strategie Given
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Hi,
i appriciate this paper.Definitely the most important step in developing the SOC is the verification part. But at the same time i ll like to ask one question Will asseration based verification is that much logical for all design.
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Mnaish Saxena (Unregistered) 05/12/06 05:42 AM
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Definitely this is good one article.
Most important thing which is preferable is the different kinds of verification like formal , functional netlist etc, and but obvious the new one Assertion based verification which one is using by the industries currently is the important and secure step to check the IP properly.
Thats y this s the gud one article which is having all the neccessary step needed for the verification of the IP core at any step before launching in the market.
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