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Emanuele Lopelli
05/21/03 02:32 AM
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I hve a problem in the design of an ADC. Actually I'm a young engineer and they told me to design a 3-bit Wilkinson ADC at 12 Msample/s with an 1LSB signal of 10mV (power supply equal to 3.3V). Actually I tested different solutions and the best one implements a preamplifier followed by a track and latch stage for the comparator. Because of mismatches even if I'm using a compensation technique for offset, it seems that it is not possible (I reached 6 Msample/s). does someone know if the choice of Wilkinson ADC can reach this performance or I need to choose another architecture? Thank you in advance to all the persons that will help me.

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