I assume you are asking about the DesignWare Verification IP usage with VCS NTB.
The best place to start is the documentation:- http://www.synopsys.com/products/designware/docs/toc/dwlibdocs.php
Look under the "Verification IP" -> "AMBA On-Chip Bus" sub category. This will provide you access to both the documentation for the DesignWare Verification IP for AMBA 2 AHB/APB and AMBA 3 AXI. The User Manual for either protocol standard will provide you details of the VIP usage. The AMBA 2.0 VIP's are compliant to the AMBA 2.0 protocol specification and the AMBA 3 AXI VIP's are classed as "AMBA 3 Assured" This logo indicates that the DesignWare VIP has been shown to correctly implement the AMBA 3 AXI specification, as defined by the assertion-based AXI protocol rule sets available from ARM
Example test benches are supplied with each of the models, to extract the examples use the dw_vip_setup script. This extracts the example files, creates the simulation scripts and runs the simulation. VCS with NTB is a fully supported combination. The examples will help you ramp up on the DesignWare VIP usage in no time.
Did you know that in addition to VCS-NTB the DesignWare Verification IP for AMBA supports VCS with SystemVerilog and the VMM methodology as defined by the Verification Methodology Manual for SystemVerilog.
Let me know if you need anymore assistance in getting up and running.
Edited by mposner on 08/15/06 01:13 PM.