I was hoping for a clear definition of the term "Verification"
At www.ictooling.com I focus on Physical Verification, this article is not quite right.
It is essential that the Physical Veritfication (DRC) be 100% correct(DRC, LVS, device extraction)
When digital verification (simulation) requires that test vectors be suppled to stimulate the device, then the concept of 100% verification becomes difficult as the input vector space becomes large.
In analog verification (simulation) the issues of process variation adds another variation that makes 100% coverage difficult.
In Physical Verification, the DRC deck is assigned a gold standard and 100% coverage is usually required (exceptions for Memorys and special cases do exist) This area is also getting to be problematic as DFM and YIELD requirements have added "recommended rules" that do not always require 100 coverage.