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Abhishek Goel
(Unregistered)
05/15/06 06:48 AM
H/w emulation gaining importance Report this article as Inappropriate to us !!!Login to Reply

One of the key take-aways from this article is that hardware emulation is gaining importance. And with ever-increasing billions of transistors that need to be integrated in future SoCs, verification of such complex chips is going to be a challenge. We will see this emulation gaining more significance in coming days. While Verification catches lot of bugs, an emulation on FPGA provides lot of confidence and could be included in the 'recipe' for first pass silicon success. The emulation could be extended, if you will, by taking different FPGA samples on different process corners and implementing different IPs/cores on such FPGA and then integrating and testing out the complete logic.


Entire thread
SubjectPosted byPosted on
*Can the chip design - verification divide be plugged in with some knee jerk band aid type strategies?  04/13/06 11:35 PM
.*Functional verif is the key of successSachin  05/16/06 04:58 AM
.*Reviewed by sandeepsandeep  05/15/06 10:14 PM
.*H/w emulation gaining importanceAbhishek Goel  05/15/06 06:48 AM
.*Reviewed by Manoj KManu  05/15/06 05:10 AM
.*manish saxenamanish saxena  05/12/06 05:44 AM
.*manish saxenaMnaish Saxena  05/12/06 05:42 AM
.*Re: manish saxena PaulineM   09/16/20 11:59 PM
.*Good verification strategie GivenRanveer Kumar  05/12/06 03:32 AM
.*traditional verification importancesachish  04/25/06 10:26 PM
.*Motive For VerificationSandeep Kuamr  04/20/06 11:21 PM
.*Re: Can the chip design - verification divide be plugged in with some knee jerk band aid type strategies?Sandilya Bhagi  04/18/06 11:36 PM
.*exellentsenthil  04/17/06 04:47 AM
.*Re: exellentRavikanth  04/18/06 11:27 PM
.*exellentsenthil  04/17/06 04:44 AM
.*exellentmaneesh  04/13/06 11:35 PM
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